Method of making metal-to-polysilicon capacitor

• US 5,108,941 A
• Filed: 03/19/1990
• Issued: 04/28/1992
• Est. Priority Date: 12/05/1986
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Tigelaar, Howard L., Paterson, James L.
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): Thomas, Tom
• Application Number:
  US07/495,870
• Time in Patent Office: 771 Days
• Field of Search: 437/47, 437/48, 437/51, 437/52, 437/60, 437/191, 437/192, 437/193, 437/195, 437/200, 437/225, 437/228, 437/233, 437/235, 437/919, 351/23.6, 351/51
• US Class Current: 438/396
• CPC Class Codes: H01L 21/765 by field effect H01L21/76264 takes precedence
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence

Abstract

A metal-to-polysilicon capacitor, a floating-gate transistor containing such a capacitor, and a method for making the same is disclosed. The bottom plate of the capacitor is formed over a field oxide structure, and the multilevel dielectric is deposited thereover. The multilevel dielectric is removed from the capacitor area, and an oxide/nitride dielectric is deposited over the exposed bottom plate and over the multilevel by way of LPCVD. A first layer of titanium/tungsten is preferably deposited prior to contact etch, and the contacts to moat and unrelated polysilicon are formed. Metallization is sputtered overall, and the metal and titanium/tungsten are cleared to leave the metallization filling the contact holes, and a capacitor having a titanium/tungsten and metal top plate.

Claims

1. A method for fabricating a capacitor at a surface of a semiconductor body, comprising the steps of:

forming a field dielectric structure at a selected portion of said surface;

forming a refractory metal layer thereover in contact with said field dielectric structure and with a silicon surface of said semiconductor body;

reacting the refractory metal layer to form a silicide where in contact with said silicon surface;

removing selected portions of the refractory metal layer which was not reacted to form a silicide, to define a bottom plate overlying said field dielectric structure;

forming an interlevel dielectric layer overall;

removing a portion of said interlevel dielectric layer over said bottom plate to expose a portion of said bottom plate;

forming a capacitor dielectric over said exposed portion of said bottom plate; and

forming a top plate comprising a metal layer in contact with said capacitor dielectric over said bottom plate.

2. The method of claim 1, wherein said refractory metal layer comprises titanium.

3. The method of claim 2, wherein a portion of said refractory metal layer overlying said field dielectric structure comprises a conductive compound of titanium.

4. The method of claim 3, wherein said conductive compound of titanium is titanium nitride.