Method of designing three dimensional electrical circuits

• US 5,109,479 A
• Filed: 09/07/1989
• Issued: 04/28/1992
• Est. Priority Date: 09/07/1989
• Status: Expired due to Term

• Current Assignee: Merchatronics, LLC
• Original Assignee: Amp-Akzo Corporation
• Inventors: Williams, John D.
• Primary Examiner(s): Markcom, Gary V.
• Assistant Examiner(s): Zimmerman, Mark K.
• Application Number:
  US07/404,262
• Time in Patent Office: 964 Days
• Field of Search: 364/522, 364/491, 364/489
• US Class Current: 345/582
• CPC Class Codes: G03F 7/20 Exposure; Apparatus therefor photographic printing apparatus for making copies G03B27/00
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347
• CPC Class Codes: H05K 1/0284 Details of three-dimensional rigid printed circuit boards H05K1/119 takes precedence; shaping of the substrate H05K3/0014
• CPC Class Codes: H05K 2203/056 Using an artwork, i.e. a photomask for exposing photosensitive layers
• CPC Class Codes: H05K 3/0002 for manufacturing artworks for printed circuits
• CPC Class Codes: H05K 3/0005 for designing circuits by computer
• CPC Class Codes: H05K 3/0082 characterised by the exposure method of radiation-sensitive masks

Abstract

A computer aided design package is used to create a mathematical representation of a three-dimensional object. This object is defined as a set of surfaces oriented in space. A map of the flattened object is created by concatenating selected ones of the surfaces on a single plane. The outline of this map is then used in a computer aided circuit layout package as a printed circuit board on which an electrical circuit is placed and routed. The circuit is translated into a three dimensional form corresponding to the surface of the object by translating and rotating the representation of the object to align each selected surface with the circuit description generated by the circuit layout package. The portion of the circuit corresponding to the surface is then transferred to a three-dimensional data structure having a format that is compatible with numerically controlled machining apparatus. This data structure is used to drive a numerically controlled machine tool that cuts a phototool. This phototool is a three-dimensional mask that may be used to print the circuit on the surface of the three-dimensional object.

Claims

1. A method for generating a representation of a three-dimensional circuit which conforms to selected surfaces of a representation of a three-dimensional object comprising the steps of:

a. generating the representation of the three-dimensional object as set of surfaces, where each surface in said set of surfaces is defined in terms of a shape and a position in space;

b. mapping the representation of the three-dimensional object onto a two-dimensional map by concatenating the shape of the selected surfaces;

c. placing circuit features corresponding to components of a two dimensional circuit on said two-dimensional map;

d. routing circuit features corresponding to connections of components of said two-dimensional circuit on said two-dimensional map to generate a representation of a two-dimensional circuit;

e. aligning one surface of the representation of the three-dimensional object in a coplanar relationship with the representation of the two-dimensional circuit;

f. establishing a correspondence between said one surface of the three-dimensional object and a portion of the representation of said two-dimensional circuit;

g. associating circuit features of said portion of the representation of the two-dimensional circuit with said one surface, and

h. copying said associated circuit features to the three-dimensional representation of said circuit.

2. The method set forth in claim 1 further including the step of repeating steps e. through h. for each selected surface in the representation of the three-dimensional object.

3. The most set forth in claim 1 wherein the step e. is preceded by the step of defining an order in which the selected surfaces are processed by steps e. through h..

4. The method set forth in claim 1 further including the steps of:

i. deleting said associated circuit features from the representation of the two-dimensional circuit; and

j. repeating steps e. through i. until no circuit features of the representation of the two-dimensional circuit can be aligned with the selected surface of the representation of the three-dimensional object.