System for relocating dynamic memory address space having received microprocessor program steps from non-volatile memory to address space of non-volatile memory

• US 5,109,521 A
• Filed: 02/05/1990
• Issued: 04/28/1992
• Est. Priority Date: 09/08/1986
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Compaq Computer Corporation (HP Inc.)
• Inventors: Culley, Paul R.
• Primary Examiner(s): Lee, Thomas C.
• Assistant Examiner(s): Donaghue, L.
• Application Number:
  US07/477,187
• Time in Patent Office: 813 Days
• Field of Search: 364/200 MS File, 364/900 MS File
• US Class Current: 711/165
• CPC Class Codes: G06F 12/0638 Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module address formation of the next microinstruction G06F9/26; masking faults in memories by using spares or by reconfiguring G11C29/70

Abstract

A personal computer transfers the contents of the computer'"'"'s slow 16 bit read only memory (ROM) into the computer'"'"'s fast 32 bit random access memory (RAM), remaps the RAM space to include the ROM space and disables the ROM. Portions of the RAM are tested before the contents are transferred. After the transfer the computer operates out of the RAM. Additionally, the RAM address space containing the ROM contents can selectively be made write protected so that the data cannot be changed.

Claims

1. A personal computer comprising:

a microprocessor having address and data lines;

a high speed data bus connected to said microprocessor data lines for transferring data to and from said microprocessor;

non-volatile memory associated with said microprocessor for storing microprocessor program steps and data and having address and data lines, said address lines being coupled to said microprocessor address lines to initially appear at a defined address space;

a slow speed data bus connected to said non-volatile memory data lines for transferring data from said non-volatile memory;

a bus controller connected to said high speed data bus and said slow speed data bus for transferring data between said data buses;

dynamic memory associated with said microprocessor having address and data lines, said address lines being coupled to said microprocessor address lines to appear at a defined address space, said address space initially excluding said address space of said non-volatile memory, and said data lines being connected to said high speed data bus;

means coupled to said dynamic memory, said non-volatile memory, said microprocessor and said bus controller for controlling transfer of said microprocessor program steps from said non-volatile memory at said non-volatile memory address space to said dynamic memory at an address space other than said non-volatile memory address space; and

means coupled to said non-volatile memory and said dynamic memory for removing said non-volatile memory from the address space of the address space of said microprocessor and relocating the portion of said dynamic memory having received said microprocessor program steps from said non-volatile memory to the former address space of said non-volatile memory after said microprocessor program steps are transferred,

wherein said microprocessor operates from said microprocessor program steps stored in said non-volatile memory prior to relocation of said dynamic memory portion and from said transferred microprocessor program steps stored in said relocated dynamic memory portion after relocation.

2. The personal computer described in claim 1 wherein said dynamic memory has a larger addressable memory bandwidth than said non-volatile memory.

3. The personal computer described in claim 1 wherein the dynamic memory is a 32-bit random access memory and the non-volatile memory is a 16-bit read only memory.

4. The personal computer described in claim 1 further comprising means coupled to said microprocessor and said dynamic memory and controllable by said microprocessor for preventing additional data from being written into said dynamic memory address space occupied by said microprocessor program steps transferred from said non-volatile memory.