Method of and circuit for synchronizing data
First Claim
1. A method of synchronizing data comprising the steps of:
- storing data in a store at a first, asynchronous, rate;
gapping a clock signal having a second, synchronous, rate greater than the first rate to produce a first gapped clock signal;
gapping the first gapped clock signal with a predetermined ratio to produce a second gapped clock signal;
reading data from the store in dependence upon the second gapped clock signal;
monitoring a frequency difference between the first gapped clock signal and the first rate multiplied by the predetermined ratio; and
in dependence upon the monitored frequency difference, controlling the gapping of the clock signal having the second rate to compensate for the frequency difference.
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Accused Products
Abstract
Asynchronous DS-1 data is byte synchronized and converted to the SONET VT1.5 format by storing the DS-1 data in a store from which it is read in dependence upon a gapped clock signal which is produced by gapping a first gapped clock signal with a ratio of 208/193, which is the ratio of VT SPE bits per frame to DS-1 bits per frame. The first gapped clock signal is produced by gapping a VT1.5 synchronous clock signal. A frequency difference between the first gapped clock signal and the asynchronous data rate, multiplied in a frequency multiplier by the ratio of 208/193, is monitored by comparing the counts of modulo-208 counters, and, in dependence upon the monitored frequency difference, the gapping of the synchronous clock signal is controlled to achieve positive or negative stuffing and hence to compensate for the frequency difference.
38 Citations
13 Claims
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1. A method of synchronizing data comprising the steps of:
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storing data in a store at a first, asynchronous, rate; gapping a clock signal having a second, synchronous, rate greater than the first rate to produce a first gapped clock signal; gapping the first gapped clock signal with a predetermined ratio to produce a second gapped clock signal; reading data from the store in dependence upon the second gapped clock signal; monitoring a frequency difference between the first gapped clock signal and the first rate multiplied by the predetermined ratio; and in dependence upon the monitored frequency difference, controlling the gapping of the clock signal having the second rate to compensate for the frequency difference. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A synchronizing circuit comprising:
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a data store; means for storing asynchronous data in the store; first gapping means for gapping a synchronous clock signal to produce a first gapped clock signal; second gapping means for gapping the first gapped clock signal with a predetermined ratio to produce a second gapped clock signal; means for reading data from the store in dependence upon the second gapped clock signal; monitoring means for monitoring a frequency difference between the first gapped clock signal and the asynchronous data rate multiplied by the predetermined ratio; and control means responsive to the monitoring means for controlling the first gapping means to compensate for the frequency difference. - View Dependent Claims (9, 10, 11, 12, 13)
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Specification