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Predistortion arrangement for a digital transmission system

  • US 5,113,414 A
  • Filed: 10/09/1990
  • Issued: 05/12/1992
  • Est. Priority Date: 10/06/1989
  • Status: Expired due to Term
First Claim
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1. A predistortion arrangement for a digital transmission system which transmits complex input data at a rate defined by a clock having a period T, comprising a power amplifier which introduces nonlinear distortion into data signals being transmitted, a modulator driving the power amplifier, and a predistortion circuit for predistorting input data signals in a sense opposite to distortion introduced in the power amplifier, and providing the predistorted signals to the modulator,characterized in that the predistortion circuit comprises a transmit filter means, responsive to receiving input data, for providing in-phase and quadrature channels of filtered, oversampled data encoded with 2N bits (N bits per channel), at a rate k/T, where k is an integer greater than 1,encoder means for receiving said filtered, oversampled data, and transforming the filtered data encoded with 2N bits into data encoded with 2M bits, where M<

  • N,a memory addressed by the 2M bits, for storing 22M complex predistortion coefficients,a complex multiplier, for multiplying the 2N bits of each data element by a selected predistortion coefficient, to produce predistorted input data (FI, FQ).

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