Digital power amplifier

• US 5,115,203 A
• Filed: 06/25/1990
• Issued: 05/19/1992
• Est. Priority Date: 06/25/1990
• Status: Expired due to Term

• Current Assignee: Rockwell International Corporation
• Original Assignee: Rockwell International Corporation
• Inventors: Kean, Timothy L., Krett, David L.
• Primary Examiner(s): MOTTOLA, STEVEN J
• Application Number:
  US07/543,281
• Time in Patent Office: 694 Days
• Field of Search: 330/10, 330/51, 330/207 A, 330/251, 330/252, 330/277, 330/295, 307/494, 455/114
• US Class Current: 330/251
• CPC Class Codes: H03F 1/0244 Stepped control
• CPC Class Codes: H03F 3/217 Class D power amplifiers; Switching amplifiers
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: H03G 3/3047 for intermittent signals, e.g. burst signals

Abstract

A wideband high efficiency amplification system for amplifying radio frequency signals to high power levels. The system includes components adapted for generating an RF carrier signal having a multi-level waveform which may be characterized as a "modified square wave" including one or more intermediate voltage levels. This RF carrier waveform allows the power of the signal to be amplified with high efficiency beyond the efficiency levels which can ordinarily be achieved with conventional wideband class D amplifiers. The preferred embodiment of the invention describes an amplification system generating and using a three level waveform although waveforms having more than three levels may also be used.

Claims

1. A high efficiency digital RF power amplification system, comprising:

an exciter for providing a low power RF carrier signal;

means for converting said RF carrier signal into a modified square wave signal characterized by a RF waveform having three or more voltage levels;

a power amplifier for amplifying the power of said modified square wave signal; and

a diplexer for filtering the output of said power amplifier in order to suppress high frequency harmonics.

2. A high efficiency digital RF power amplification system comprising:

an exciter for providing a low power RF carrier signal;

means for converting said RF carrier signal into a modified square wave signal characterized by a RF waveform having three or more voltage levels; and

a power amplifier for amplifying the power of said modified square wave signal which includes a pair of gallium arsenide field effect transistors of the same conductivity type which are connected in a push-pull configuration.

3. A process for increasing the efficiency of an RF digital power amplifier comprising the step of:

converting the RF carrier signal to be amplified by said power amplifier into a modified square wave signal having an RF waveform including three or more voltage by comparing said RF carrier signal to fixed voltage thresholds using comparators installed on separate signal channels in order to generate separated pulse trains which may be combined to produce said modified square wave signal.

4. The process of claim 3, in which said modified square wave includes a single intermediate voltage level at the zero potential level.

5. The process of claim 4, in which said modified square wave is at zero potential for approximately 25.8% of the time during each RF cycle.

6. The process of claim 3, further including the step of amplifying the power of said modified square wave signal using a pair of GaAs field effect transistors of the same conductivity type which are connected in a push-pull confirmation.

7. A high efficiency digital RF power amplification system, comprising:

means for generating a low power RF carrier signal;

first comparator means for comparing said RF carrier signal to a first voltage level in order to produce a first pulse train having substantially less than a 50% duty cycle;

second comparator means for comparing said RF carrier signal to a second voltage level in order to produce a second pulse train having less substantially less than a 50% duty cycle;

means for amplifying the power of RF signals; and

means for separately combining said pulse trains to form an RF signal having a multilevel waveform.

8. The power amplification system of claim 7, wherein said first and second comparator means comprise differential amplifiers.

9. The power amplification system of claim 7, wherein said first and second pulse trains have approximately 37% duty cycles.

10. The power amplification system of claim 7, further including a set of GaAsFET amplifiers for amplifying the power of said pulse train signals.

11. The power amplification system of claim 10, further including a diplexer for filtering the output of said power amplification system in order to suppress high frequency harmonics.