Method and apparatus for carrier synchronization and data detection
First Claim
Patent Images
1. In an apparatus for estimating concurrent phase synchronization and data detection from a received signal (103), said received signal including at least one suppressed carrier modulated with at least one data signal, said apparatus including:
- a) first mixing means (106,
108) for mixing said received signal (103) with a reference carrier signal (113,
115) and providing a first mixing means output (109,
111);
b) data recovery means for sampling (114,
116) said first mixing means output and providing a first sampling means output (117,
119);
c) delay element means (118,
120) for delaying said first sampling means output and providing a first delaying means output (121,
123);
d) first amplification means (554,
556) for amplification said first sampling means output (119,
117), where an amount of amplification--gain is governed by a phase setting signal (535) and providing a first amplified output (555,
557);
e) first signal addition/subtraction means (550,
552) for addition/subtraction said first amplified output and said first sampling means output (117,
119) and providing a first sum means output;
f) first equalization means (540,
542) for equalization of timing error caused intersymbol interference said first sum means output, where tap gains are governed by the timing (clock) error signal, and providing a first equalized signal (551,
553),g) attenuation means (580,
582) for attenuation said first equalized signal, where an amount of attenuation is governed by said phase setting signal (535) and providing a second attenuated output (581,
583);
h) first data estimating means (122,
124) for estimating said second attenuated output to obtain a data estimate (525,
527);
i) second mixing means (126,
128) for mixing said data estimate with said first delaying means and providing a second mixing means output (595,
597);
j) second signal addition/subtraction means (130) for addition/subtraction of second mixing means and a correction signal (131) and providing a first error signal (533);
k) filtering means G(f) (132) for filtering of said first error signal and providing a first filtered error signal;
l) signal estimating means (590) for estimating said first filtered error signal and providing said phase setting signal (535);
m) first voltage controlled oscillator means (112) for providing an estimated carrier phase error signal (137) in accordance with said phase setting signal;
n) splitting means (110) for splitting said estimated carrier phase error signal and providing said reference carrier signal (113,
115).
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Abstract
The present invention is directed to circuitry for achieving an improved carrier synchronization (i.e. estimation of carrier'"'"'s phase) and data detection for digital data, suppressed carrier transmission systems. A new method--and corresponding apparatus--for pattern jitter cancellation and quadrant ambiguity removal, when incorporated within known or new carrier recovery scheme, results in an improved carrier synchronization and data detection. The resultant carrier recovery and data detection circuitry might be employed for phase estimation and the detection of balanced and unbalanced, coded or uncoded, quadrature amplitude modulation signals. Global positioning system receivers, cable, satellite and radio systems are some examples of where these circuitry might find an application.
42 Citations
1 Claim
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1. In an apparatus for estimating concurrent phase synchronization and data detection from a received signal (103), said received signal including at least one suppressed carrier modulated with at least one data signal, said apparatus including:
-
a) first mixing means (106,
108) for mixing said received signal (103) with a reference carrier signal (113,
115) and providing a first mixing means output (109,
111);b) data recovery means for sampling (114,
116) said first mixing means output and providing a first sampling means output (117,
119);c) delay element means (118,
120) for delaying said first sampling means output and providing a first delaying means output (121,
123);d) first amplification means (554,
556) for amplification said first sampling means output (119,
117), where an amount of amplification--gain is governed by a phase setting signal (535) and providing a first amplified output (555,
557);e) first signal addition/subtraction means (550,
552) for addition/subtraction said first amplified output and said first sampling means output (117,
119) and providing a first sum means output;f) first equalization means (540,
542) for equalization of timing error caused intersymbol interference said first sum means output, where tap gains are governed by the timing (clock) error signal, and providing a first equalized signal (551,
553),g) attenuation means (580,
582) for attenuation said first equalized signal, where an amount of attenuation is governed by said phase setting signal (535) and providing a second attenuated output (581,
583);h) first data estimating means (122,
124) for estimating said second attenuated output to obtain a data estimate (525,
527);i) second mixing means (126,
128) for mixing said data estimate with said first delaying means and providing a second mixing means output (595,
597);j) second signal addition/subtraction means (130) for addition/subtraction of second mixing means and a correction signal (131) and providing a first error signal (533); k) filtering means G(f) (132) for filtering of said first error signal and providing a first filtered error signal; l) signal estimating means (590) for estimating said first filtered error signal and providing said phase setting signal (535); m) first voltage controlled oscillator means (112) for providing an estimated carrier phase error signal (137) in accordance with said phase setting signal; n) splitting means (110) for splitting said estimated carrier phase error signal and providing said reference carrier signal (113,
115).
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Current AssigneeAndy D. Kucar
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Original AssigneeAndy D. Kucar
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InventorsKucar, Andy D.
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Primary Examiner(s)Chin, Stephen
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Application NumberUS07/048,777Time in Patent Office1,834 DaysField of Search375/77, 375/81, 375/83, 375/93, 329/304, 329/306, 329/307, 329/308, 455/208, 455/209US Class Current375/321CPC Class CodesG01S 19/29 carrier including Doppler, ...H04L 27/3827 in which the carrier is rec...
