Data transmission control processing system

• US 5,117,070 A
• Filed: 10/09/1990
• Issued: 05/26/1992
• Est. Priority Date: 10/06/1989
• Status: Expired due to Term

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Yamamoto, Terumasa, Nakatani, Naofumi, Ueno, Reiko, Ikezaki, Masao, Nakatsu, Hiromasa
• Primary Examiner(s): SCHREYER, STAFFORD
• Application Number:
  US07/595,227
• Time in Patent Office: 595 Days
• Field of Search: 178/2 R, 178/3, 178/17.5, 370/43, 340/825.21, 340/825.27, 340/825.52
• US Class Current: 178/2.00R
• CPC Class Codes: H04L 5/14 Two-way operation using the same type of signal, i.e. duplex

Abstract

A data transmission control processing system comprising the steps of easily realizing the reading, writing of the memories of the other terminals coupled with the above described transmission passages in a system where a plurality of terminals provided with a transmitting, receiving control processing portion for transmitting receiving the control signals are coupled by transmitting passages so as to effect the mutual communication, realizing the writing onto the memories by a system similar to the reading of the memories when the above described system is a system by the D2B, being capable of easily coping with respect to the expansion of the reading.writing control operation of the memories, simplifying the realization of the reading.writing control sequence which is adapted to reduce the amount of the telegraphic messages to be exchanged in the reading.writing operation of the memories on the other terminal.

Claims

1. A data transmission control processing system where in a communication system where a plurality of terminals provided respectively with a transmitting, receiving control processing portion for transmitting, receiving control signals are coupled by transmission passages so as to effect the mutual communication, a data telegraphic message which configures as a telegraphic message the memory contents of the above described writing or reading to be used when a first terminal effects the writing or reading of the memories a second terminal has by the transmission and reception of above described control signal is provided with a first portion (data identifier) showing the form of the above described data telegraphic message and the writing. reading attribute, and a second portion (data information portion) having the data information of the contents different depending upon the value of the above described first portion, the data information portion is provided with a third portion (access object memory address indication portion) indicating the address of the memory of the access object for effecting the writing or the reading, and a fourth portion (memory access information portion) showing the specification of the writing or reading onto the above described access object memory and the concrete writing or reading memory contents, the access object memory address indication portion is provided with a fifth portion (memory address type identifier) showing the assignment form of the memory address and a sixth portion (access object memory address information portion) showing the address of the access object memory with a form shown with the above described memory address type identifier, the memory access information portion is provided with a seventh portion (memory access type identifier) showing a form of the memory information to be accessed, an eighth portion (access object memory information portion) showing the size of the memory contents to be accessed and the memory contents to be concretely written with the form shown by the above described memory access type identifier.

2. A data transmission control processing system described in accordance with the claim 1, where as an address specification form of the memory by the telegraphic message, the access object memory address information portion has a first assignment form (direct address assignment form) for specifying a value the same as the value of the memory address, and a second assignment form (indirect access assignment form) for specifying a conversion rule for converting a value into an address value by the first assignment form, a memory address operation code for specifying the contents of the conversion processing in accordance with the conversion rule and a memory address operand code which is an information portion necessary to carry out the conversion processing specified so as to specify the conversion rule.

3. A data transmission control processing system described in accordance with the claim 1, where the memory address type identifier is provided with an address type version indication portion for indicating the version of the address type and a memory address type detail indication portion for fully indicating the type of the memory address.

4. A data transmission control processing system described in accordance with the claim 1, where the data identifier is provided with a data information version indication portion for indicating the version of the data information and a data information version detail indication portion for indicating the detailed configuration of the data information.