Balance and protection for stacked RF amplifiers
First Claim
1. A balance circuit for an amplifier circuit having 2M amplifiers serially biased across a supply potential node and a common potential node, where M is an integer greater than 0, and having respective 2M -1 interstage bias nodes and voltages between the amplifiers which are driven by respective input drive signals provided by 2M -1 2-way power splitters, the balance circuit comprising:
- reference means for providing from each power splitter to each amplifier first and second reference potentials respectively associated therewith; and
a plurality of control means associated with respective power splitters and interstage nodes, each control means being responsive to said associated first and second reference potentials and associated interstage bias node potential for controlling the signal levels of first and second drive signals provided by the associated 2-way splitter as a function of the level of the associated interstage bias potential relative to said associated first and second reference potentials.
2 Assignments
0 Petitions
Accused Products
Abstract
A balance circuit for an amplifier circuit having 2M amplifiers serially biased across a supply potential node and a common potential node, where M is an integer greater than 0, and having respective 2M -1 interstage bias nodes and voltages between the amplifiers which are driven by respective input drive signals provided by 2M -1 2-way power splitters. A voltage reference circuit provides as to each power splitter first and second reference potentials respectively associated therewith. A plurality of control circuits are associated with respective power splitters and interstage nodes. Each control circuit is responsive to the associated first and second reference potentials and the interstage bias node for controlling the signal levels of the first and second drive signals provided by the associated 2-way splitter as a function of the associated interstage bias potential relative to the first and second reference potentials.
19 Citations
4 Claims
-
1. A balance circuit for an amplifier circuit having 2M amplifiers serially biased across a supply potential node and a common potential node, where M is an integer greater than 0, and having respective 2M -1 interstage bias nodes and voltages between the amplifiers which are driven by respective input drive signals provided by 2M -1 2-way power splitters, the balance circuit comprising:
-
reference means for providing from each power splitter to each amplifier first and second reference potentials respectively associated therewith; and a plurality of control means associated with respective power splitters and interstage nodes, each control means being responsive to said associated first and second reference potentials and associated interstage bias node potential for controlling the signal levels of first and second drive signals provided by the associated 2-way splitter as a function of the level of the associated interstage bias potential relative to said associated first and second reference potentials. - View Dependent Claims (2, 3, 4)
-
Specification