Process for multi-layer photoresist etching with minimal feature undercut and unchanging photoresist load during etch

• US 5,126,231 A
• Filed: 02/26/1990
• Issued: 06/30/1992
• Est. Priority Date: 02/26/1990
• Status: Expired due to Term

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Levy, Karl B.
• Primary Examiner(s): McCamish, Marion E.
• Assistant Examiner(s): Duda, Kathleen
• Application Number:
  US07/485,331
• Time in Patent Office: 855 Days
• Field of Search: 430/270, 430/312, 430/313, 430/317, 430/318, 430/322, 430/325, 430/326, 430/329, 430/331, 430/316, 156/643, 156/651, 156/652, 156/659.1, 156/660, 156/661.1
• US Class Current: 430/313
• CPC Class Codes: G03F 7/094 Multilayer resist systems, e.g. planarising layers
• CPC Class Codes: G03F 7/095 having more than one photosensitive layer G03F7/075 takes precedence
• CPC Class Codes: H01L 21/0274 Photolithographic processes

Abstract

A process is disclosed for accurately forming an etch mask over the uneven surface of a semiconductor wafer using a multilayer photoresist. The process comprises forming a first or lower photoresist layer on the surface of a semiconductor wafer, forming one or more intermediate layers over the first photoresist layer, forming a second or upper photoresist layer over the one or more intermediate layers on the wafer, photolithographically forming a pattern in the second photoresist layer, reproducing the pattern in the intermediate layer below the second photoresist layer, removing the remainder of the upper photoresist layer, and then reproducing the pattern in the first photoresist layer using the pattern formed in the intermediate layer as a mask. In one embodiment a single intermediate layer is used in which the mask pattern is partially etched prior to removal of the upper photoresist. In another embodiment, two intermediate layers are used, with the lower layer used as an etch stop to permit the upper photoresist pattern to be completely etched through the upper intermediate layer before removal of the upper photoresist. The process offers improvement over the prior art by minimizing undercut caused by ion reflection as well as offering an unchanging process loading during the critical photoresist etch.

Claims

1. A process for forming an etch mask over the surface of a semiconductor wafer using a multilayer photoresist wherein a mask pattern photolithographically formed in the upper photoresist layer of said multilayer photoresist may be accurately reproduced in the lower photoresist layer of said multilayer photoresist which comprises:

a) forming a photoresist layer on the surface of a semiconductor wafer which will be the lower photoresist layer of said multilayer photoresist;

b) forming one or more intermediate layers over said lower photoresist layer;

c) forming an upper photoresist layer over said one or more intermediate layers on said wafer;

d) photolithographically forming a pattern in said upper photoresist layer;

e) reproducing said pattern in a portion of said one or more intermediate layers below and in contact with said upper photoresist layer;

f) removing the remainder of said upper photoresist layer;

g) then reproducing said pattern in a portion of said one or more intermediate layers in contact with said lower photoresist layer using said previously etched portion of said one or more intermediate layers as a mask; and

h) then reproducing said pattern in said lower photoresist layer using said pattern formed in said one or more intermediate layers as a mask;

whereby a mask pattern photolithographically formed in said upper photoresist layer may be accurately reproduced in said lower photoresist layer while removing said upper photoresist layer before said pattern is reproduced in said lower photoresist layer.

2. The process of claim 1 wherein said step of reproducing said pattern in a portion of said one or more said intermediate layers below and in contact with said upper photoresist layer further comprises anisotropically etching said portion of said one or more intermediate layers.

3. The process of claim 2 wherein a single intermediate layer is used and said step of reproducing said pattern in said portion of said one or more intermediate layers below and in contact with said upper photoresist layer further comprises the steps of anisotropically etching said pattern partially through from about 60 to about 90% of the thickness of said single intermediate layer before said step of removing the remainder of said upper photoresist layer;

and then anisotropically etching through the remainder of said partially etched portion of said single intermediate layer after said step of removing said upper layer of photoresist.

4. The process of claim 3 wherein said step of reproducing said pattern in said intermediate layer below said upper photoresist layer by anisotropically etching partially through said single intermediate layer further comprises anisotropically etching through from about 70 to about 80% of the thickness of said single intermediate layer.

5. The process of claim 3 wherein said single intermediate layer is selected from the group consisting of silicon dioxide, silicon nitride, polysilicon, and aluminum.

6. The process of claim 5 wherein said single intermediate layer comprises silicon dioxide.

7. The process of claim 1 including the further step of removing said one or more intermediate layers after reproducing said pattern in said first photoresist layer.

8. The process of claim 1 wherein said step of forming one or more intermediate layers over said lower photoresist layer further comprises forming upper and lower intermediate layers of different materials over said lower photoresist layer;

and said step of reproducing said pattern in a portion of said one or more intermediate layers below and in contact with said upper photoresist layer further comprises anisotropically etching said upper intermediate layer using said lower intermediate layer as an etch stop.

9. The process of claim 8 including the further step of etching said lower intermediate layer, after said step of removing the remainder of said upper photoresist layer, using said pattern etched in said upper intermediate layer as an etch mask.

10. The process of claim 9 wherein said upper intermediate layer is selected from the group consisting of silicon dioxide, silicon nitride, polysilicon, aluminum, tungsten, tungsten silicide, titanium, titanium silicide, titanium nitride, titanium-tungsten, a gallium compound, an indium compound, an antimony compound, an arsenic compound, a boron compound, and a phosphorus compound;

and said lower intermediate layer comprises another material in said group.

11. The process of claim 10 wherein one of said upper and lower intermediate layers comprises silicon dioxide and the other of said upper and lower intermediate layers comprises aluminum.

12. A process for forming an etch mask over the uneven surface of a semiconductor wafer using a multilayer photoresist to accurately reproduce in the lower photoresist layer a pattern photolithographically formed in the upper photoresist layer comprising the steps of:

a) forming a lower photoresist layer on said surface of said semiconductor wafer;

b) forming an intermediate layer of a different material over said lower photoresist layer;

c) forming an upper photoresist layer over said intermediate layer on said wafer;

d) photolithographically forming a pattern in said upper photoresist layer;

e) reproducing said pattern in said intermediate layer by anisotropically etching a portion of said intermediate layer using said patterned upper photoresist layer as an etch mask;

f) removing the remainder of said upper photoresist layer;

g) blanket etching said intermediate layer sufficiently to expose the lower layer of photoresist through said pattern of openings in said intermediate layer; and

h) reproducing said pattern in said lower photoresist layer using said pattern formed in said intermediate layer as a mask;

whereby a mask pattern photolithographically formed in said upper photoresist layer may be accurately reproduced in said lower photoresist layer after removal of said upper photoresist layer.

13. The process of claim 12 wherein said step of anisotropically etching a portion of said intermediate layer using said patterned upper photoresist layer as an etch mask further comprises anisotropically etching through from about 60 to about 90% of the thickness of said intermediate layer.

14. The process of claim 12 wherein said step of anisotropically etching a portion of said intermediate layer using said patterned upper photoresist layer as an etch mask further comprises anisotropically etching through from about 70 to about 80% of the thickness of said intermediate layer.

15. The process of claim 12 wherein said intermediate layer is selected from the class consisting of silicon dioxide, silicon nitride, polysilicon, and aluminum.

16. The process of claim 12 wherein said intermediate layer comprises a refractory material selected from the class consisting of tungsten, tungsten silicide, titanium, titanium silicide, titanium nitride, and titanium-tungsten.

17. The process of claim 12 wherein said intermediate layer comprises a Group III or Group V compound selected from the class consisting of a gallium compound, an indium compound, an antimony compound, an arsenic compound, a boron compound, and a phosphorus compound.

18. The process of claim 12 wherein said intermediate layer comprises silicon dioxide.

19. A process for forming an etch mask over the uneven surface of a semiconductor wafer using a multilayer photoresist to accurately reproduce in the lower photoresist layer a pattern photolithographically formed in the upper photoresist layer comprising the steps of:

a) forming a lower photoresist layer on said surface of said semiconductor wafer;

b) forming a lower intermediate layer of a different material over said lower photoresist layer;

c) forming an upper intermediate layer of a different material than either said lower intermediate layer or said lower photoresist layer over said lower intermediate layer;

d) forming an upper photoresist layer over said upper intermediate layer on said wafer;

e) photolithographically forming a pattern in said upper photoresist layer;

f) reproducing said pattern in said upper intermediate layer by anisotropically etching said upper intermediate layer using said patterned upper photoresist layer as an etch mask and said lower intermediate layer as an etch stop;

g) removing the remainder of said upper photoresist layer;

h) etching the exposed portions of said lower intermediate layer, using said patterned upper intermediate layer as a mask, to expose portions of said lower layer of photoresist through said pattern of openings etched in said upper and lower intermediate layers; and

i) reproducing said pattern in said first photoresist layer using said pattern formed in said upper and lower intermediate layers as a mask;

whereby a mask pattern photolithographically formed in said upper photoresist layer may be accurately reproduced in said lower photoresist layer after said upper photoresist layer has been removed.

20. The process of claim 19 wherein said lower intermediate layer is selected from the group consisting of silicon dioxide, silicon nitride, polysilicon, aluminum, tungsten, tungsten silicide, titanium, titanium silicide, titanium nitride, titanium-tungsten, a gallium compound, an indium compound, an antimony compound, an arsenic compound, a boron compound, and a phosphorus compound;

and said upper intermediate layer comprises an other material in said group.

21. The process of claim 19 wherein one of said intermediate layers comprises aluminum and the other of said intermediate layers comprises silicon dioxide.