Liquid crystal display with sub-pixels

• US 5,126,865 A
• Filed: 12/31/1990
• Issued: 06/30/1992
• Est. Priority Date: 12/31/1990
• Status: Expired due to Term

• Current Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Original Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Inventors: Sarma, Kalluri R.
• Primary Examiner(s): Miller, Stanley D.
• Assistant Examiner(s): TRICE, RONALD
• Application Number:
  US07/636,534
• Time in Patent Office: 547 Days
• Field of Search: 350/333, 350/336, 350/339 R, 350/331 R, 359/59, 359/87, 340/784
• US Class Current: 349/85
• CPC Class Codes: G02F 1/134345 Subdivided pixels, e.g. for grey scale or redundancy
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 2203/30 Gray scale

Abstract

A half-tone pixel having subpixels and control capacitor constituting a 100 percent optically active pixel. The subpixel design results in no reductions in the maximum pixel aperture ratio, brightness or contrast, as a pixel with no subpixels would have. Various subpixel layouts including differing numbers of subpixels and subpixel-turn-on sequences may be implemented and still result in the entire pixel being optically active.

Claims

1. A grayscale liquid crystal display comprising a plurality of pixels having a high pixel aperture ratio, comprising a first substrate and a second substrate wherein each pixel further comprises:

first, second, third, fourth and fifth subpixels;

a first electrode located on said first substrate;

a second electrode located on said first substrate;

a third electrode located on said first substrate;

a fourth electrode located on said first substrate;

a fifth electrode situated between said first, second, third and fourth electrodes, respectively, and located on said first substrate;

a dielectric layer situated on said at least first, second, third, fourth and fifth electrodes, said dielectric layer having a via proximate to said fifth electrode;

a sixth electrode situated on said dielectric layer, proximate to said first electrode and defining said first subpixel;

a seventh electrode situated on said dielectric layer, proximate to said second electrode and defining said second subpixel;

an eighth electrode situated on said dielectric layer, proximate to said third electrode and defining said third subpixel;

a ninth electrode situated on said dielectric layer, proximate to said fourth electrode and defining said fourth subpixel;

a tenth electrode situated on said dielectric layer and connected through the via of said dielectric layer to said fifth electrode, and defining said fifth subpixel;

a liquid crystal layer situated on said sixth, seventh, eighth, ninth and tenth electrodes;

an eleventh electrode situated on said liquid crystal layer; and

said second substrate supporting said eleventh electrode.

2. Display of claim 1 wherein said first, second, third, fourth and fifth electrodes are connected to one another.

3. Display of claim 2 further comprising a transistor connected to at least one of said first, second, third, fourth and fifth electrodes.

4. Display of claim 3 wherein:

said first and sixth electrodes form a first control capacitance;

said second and seventh electrodes form a second control capacitance;

said third and eighth electrodes form a third control capacitance;

said fourth and ninth electrodes form a fourth control capacitance;

said eleventh electrode and sixth electrode form a first liquid crystal capacitance of said first subpixel;

said eleventh electrode and seventh electrode form a second liquid crystal capacitance of said second subpixel;

said eleventh electrode and eighth electrode form a third liquid crystal capacitance of said third subpixel;

said eleventh electrode and ninth electrode form a fourth liquid crystal capacitance of said fourth subpixel; and

said eleventh electrode and fifth electrode form a fifth liquid crystal capacitance.

5. A grayscale liquid crystal display, having a high pixel aperture ratio, comprising:

a matrix substrate having an approximately planar surface;

a plurality of pixels wherein each pixel comprises;

a plurality of primary subpixels wherein each primary subpixel comprises;

a first electrode situated on the planar surface of said matrix substrate;

a dielectric layer situated on said first electrode; and

a second electrode situated on said dielectric layer such that said dielectric layer is situated between said first and second electrodes, and said second electrode defines and delineates an area of said primary subpixel; and

at least one secondary subpixel comprising a first electrode situated on said matrix substrate, said first electrode defining and delineating an area of said secondary subpixel, and said secondary subpixel being situated in an area of said pixel not defined and delineated by said primary subpixels; and

wherein;

said first electrodes of said primary subpixels of said pixel, are connected to one another;

said first electrode of said at least one secondary subpixel of said pixel is connected to at least one of said first electrodes of said primary subpixels of said pixel; and

each of said first electrodes of said primary subpixels of said pixel has a surface area size different from surface area sizes of the other of said first electrodes of said primary subpixels of said pixel.

a common electrode substrate with a common electrode having an approximately planar surface proximate to said second electrodes of said primary and secondary subpixels of each of said plurality of pixels, and parallel to the planar surface of said matrix substrate; and

a liquid crystal layer situated between said common electrode and said second electrodes of said primary and secondary subpixels of each of said plurality of pixels.

6. Display of claim 5 wherein:

said first and second electrodes of each primary subpixel has a control capacitance value proportional to the surface area size of said first electrode;

each primary subpixel of each pixel, is activated upon application of a particular voltage to the respective first electrode and said common electrode, the particular voltage having a value that exceeds the threshold voltage value of said primary subpixel so that said primary subpixel is activated, the threshold value of said primary subpixel being inversely proportional to the control capacitance value of said first and secondary electrodes of said primary subpixel; and

said secondary subpixel of each pixel has a direct connection and is activated upon application of a particular voltage that exceeds the threshold voltage value of said secondary subpixel.

7. Display of claim 6 wherein said primary subpixels of each of said plurality of pixels, are concentric to the secondary subpixels.

8. Display of claim 7 further comprising a coupling capacitor wherein said coupling capacitor comprises:

a first electrode connected to said first electrode of at least one of said primary subpixels of each pixel; and

a second electrode connected to said first electrode of said secondary subpixel of each respective pixel, and said first electrode of said secondary subpixel of each respective pixel is disconnected form said first electrodes of said primary subpixels of each respective pixel.