Memory package system

• US 5,128,972 A
• Filed: 02/22/1990
• Issued: 07/07/1992
• Est. Priority Date: 03/22/1989
• Status: Expired due to Fees

• Current Assignee: Tokyo Keiki Co Ltd (Tokyo Keiki Incorporated)
• Original Assignee: Tokyo Keiki Co Ltd (Tokyo Keiki Incorporated)
• Inventors: Horinouchi, Shinichi, Takeuchi, Kunihiko, Oba, Masao
• Primary Examiner(s): Safourek, Benedict V.
• Assistant Examiner(s): Bocure, Tesfaldet
• Application Number:
  US07/483,464
• Time in Patent Office: 866 Days
• Field of Search: 455/41, 375/35, 375/121, 375/6, 365/66, 365/100, 365/189, 365/189.01, 365/189.04, 369/61, 369/59, 364/424.04, 370/69.1
• US Class Current: 375/377
• CPC Class Codes: G11C 5/142 Contactless power supplies, e.g. RF, induction, or IR
• CPC Class Codes: G11C 7/00 Arrangements for writing information into, or reading information out from, a digital store G11C5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C11/4063, G11C11/413

Abstract

Bidirectional transmission of write and read data is effected between a reader/writer unit and a memory module in a contactless manner using electromagnetic induction coupling. A single magnetic induction coupling apparatus is provided for each of the reader/writer unit and the memory module. In the electromagnetic induction coupling apparatus of the reader/writer unit, a transmitting coil and a receiving coil are coaxially wound around a single magnetic core. In the electromagnetic induction coupling apparatus of the memory module, a single coil which is commonly used for transmission and reception is wound around a single magnetic core. A reception signal of the transmitting/receiving coil of the memory module is rectified and smoothed by a power source circuit, thereby forming an operating power source of the memory module. The power source circuit has a backup capacitor. In the transmitting mode in which no power source is externally supplied, the operating power source is supplied from the backup capacitor.

Claims

1. A memory package system comprising a read/write unit and a memory module, wherein bidirectional transmission of write data and read data is effected between said memory module and said read/write unit via electromagnetic induction coupling,

said read/write unit comprising:

(a) a first electromagnetic induction coupling device which includes a transmitting coil and a receiving coil coaxially wound around a single core;

(b) down modulating means for modulating down transmission data which is to be transmitted to the memory module and for applying thus modulated down transmission data to said transmitting coil of said first electromagnetic induction coupling device; and

(c) up demodulating means for demodulating as up reception data a signal induced in said receiving coil of said first electromagnetic induction coupling device,

said memory module comprising;

(a) a non-volatile memory;

(b) a second electromagnetic induction coupling device which includes a single transmitting/receiving coil which is commonly used in both a receiving mode and a transmitting mode wound around a single magnetic core;

(c) down demodulating means for demodulating as down reception data a signal induced in said transmitting/receiving coil during the receiving mode;

(d) memory control means for writing and reading data into and from said non-volatile memory on the basis of the down reception data demodulated by said down demodulating means;

(e) power supply means for rectifying the down signal induced in said transmitting/receiving coil and for forming and operating power source of said memory module;

(f) up modulating mean for modulating read data which has been read out of said non-volatile memory by said memory control means;

(g) coil switching means, response to said memory control means, for supplying an output of said up modulating means to said transmitting/receiving coil only during the transmitting mode in which up transmission data is transmitted to said read/write unit; and

(h) a backup capacitor for charging an output voltage of said power supply means and for supplying a power source when data is transmitted from said memory module to said read/write unit.

2. A memory package system according to claim 1, wherein said backup capacitor functions as a smoothing capacitor of said power supply means.

3. A memory package system according to claim 1, wherein said coil switching means of said memory module includes a 3-state buffer which is set into a disenable state in he receiving mode in which a high impedance is present at a connection to the transmitting/receiving coil, and which is switched into an enable state in the transmitting mode in which an output is generated corresponding to first and second logic levels.

4. A memory package system according to claim 1, wherein said up modulating means of said memory module includes frequency code generating means for generating a frequency code signal when a data bit 1 or 0 to write or read out the data into or from the non-volatile memory or a predetermined command is input thereto, wherein said frequency code signal comprises a preamble portion having a first predetermined number of waves of a first frequency, a first terminator portion having a second predetermined number of waves of a second frequency subsequent to the preamble, a data portion having a number of waves of the first frequency which differs depending on the input data bit 1 or 0 or the command and having a number of waves which is smaller than the first predetermined number of waves of the preamble subsequent to the first terminator, and a second terminator portion having the second predetermined number of waves of the second frequency subsequent to said data portion, and

wherein said down demodulating means of said memory module includes frequency code demodulating means for identifying a code generated from said frequency code generating means and included in the down reception signal of said transmitting/receiving coil and for demodulating the data bit 1 or 0 or the command.

5. A memory package system according to claim 1, wherein said up modulating means of said memory module includes an M series generating means for generating a first M series signal and a second M series signal which differ in correspondence to bits 1 and 0 of the read data, and

wherein said up demodulating means of the read/write unit includes correlation calculating means for previously storing as first and second reference values signal which are the same as the first and second M series signals, for calculating correlations between an up reception signal of said reception coil and the first and second reference values, and for outputting a data bit corresponding to the reference value of the larger one of the two calculated correlation values.

6. A memory package system according to claim 1, wherein said up modulating means of said memory module includes frequency modulating means for generating first and second frequency signals which differ in correspondence to bits 1 and 0 of the read data, and

wherein said up demodulating means of the read/write unit includes frequency demodulating means for demodulating the data bit 1 or 0 from the first or second frequency signal which has been received by said receiving coil.