Digital signal processing system for parallel processing of subsampled data

• US 5,130,797 A
• Filed: 02/23/1990
• Issued: 07/14/1992
• Est. Priority Date: 02/27/1989
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Wakabayashi, Takao, Ogura, Kohji, Murakami, Tokumichi, Kinjo, Naoto, Ohira, Hideo, Kamizawa, Koh
• Primary Examiner(s): Kostak, Victor R.
• Application Number:
  US07/483,840
• Time in Patent Office: 872 Days
• Field of Search: 358/133, 358/138, 358/135, 358/136, 358/105, 364/748, 364/749, 364/736
• US Class Current: 375/240.16
• CPC Class Codes: H04N 19/00 Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
• CPC Class Codes: H04N 19/30 using hierarchical techniques, e.g. scalability H04N19/63 takes precedence
• CPC Class Codes: H04N 19/43 Hardware specially adapted for motion estimation or compensation
• CPC Class Codes: H04N 19/436 using parallelised computational arrangements
• CPC Class Codes: H04N 19/51 Motion estimation or motion compensation
• CPC Class Codes: H04N 19/533 Motion estimation using multistep search, e.g. 2D-log search or one-at-a-time search [OTS]
• CPC Class Codes: H04N 19/577 Motion compensation with bidirectional frame interpolation, i.e. using B-pictures
• CPC Class Codes: H04N 19/587 involving temporal sub-sampling or interpolation, e.g. decimation or subsequent interpolation of pictures in a video sequence

Abstract

A video codec system inputs consecutively frame after frame of sub-sampled video data obtained by sub-sampling video data in units of frames. The video data is coded in parallel by internal coding circuits. This averages the numbers of significant pixels in the sub-sampled video data to be processed. The coded video data is composed so as to comply with specifications of the receiving equipment. Upon transmission, the data is again sub-sampled depending on the number of coding circuits on the receiving side. Each piece of the sub-sampled data is given a header for consecutive transmission. This allows for a certain period of time between pieces of data that arrive at the receiving side, thereby eliminating time differences in receiving and coding.

Claims

1. A video codec system having "n" coding means disposed in parallel for coding video data, said system comprising:

inputting a single frame of data obtained by sub-sampling "n" pieces of video data per frame, each piece of said sub-sampled video data being transmitted consecutively after being given a header;

coding "n" pieces of said sub-sampled video data by use of said "n" coding means;

composing all of or adaptively a selected part of said "n" pieces of said coded video data; and

sub-sampling "m" pieces of said composed coded video data, each piece being given a header consecutively when transmitted.

2. A motion compensation system in an interframe coding system comprising a motion compensation means which divides into a plurality of blocks a current input frame of digital video data having a plurality of frames consecutively input over time, which calculates pattern-to-pattern approximations between each block of video data in said current input frame and the blocks in the preceding input frame coded reproduction data, and which detects therebetween the block and motion vector involving the least distortion, said least distortion block acquired by said motion compensation means being used as a predictive signal for data codec processing by said interframe coding system, said motion compensation system comprising a sampling circuit means and a sample data memory means, said sampling circuit means dividing said reproduction data into blocks small enough to equally divide said input block, said sampling circuit means further extracting as samples the mean value of pixels in said small blocks or the value of pixels in specific positions, said sample data memory means storing at least one frame of sample values extracted by said sampling circuit means, said motion compensation means finding a sample data pattern made up of the mean value or specific pixel value per small block with respect to said input block in the same manner as said sampling circuit means does, said motion compensation means having first search motion vectors located to surround the position of said input block within said reproduction frame data in a manner that said location constitutes a multiple of said small block during detection of said motion vectors, said sample data memory means being accessed to read out an intrablock sample data pattern in the position indicated by said motion vectors, said sample data pattern being used to calculate the amount of distortion which represents the degree of pattern similarity between said data pattern and the sample data pattern of said input block, said amount of distortion being used to detect the first search motion vector that provides the least distortion, said first search motion vector being surrounded by highly concentrated second search motion vectors, said second search motion vectors being used to calculate said amount of distortion between the intrablock pixel pattern in said reproduction frame and the pixel pattern in said input block, said amount of distortion being used to detect the least distortion block and the motion vector associated therewith, said least distortion block and said motion vector being output respectively as the final predictive signal and motion vector.

3. A video coding system comprising:

a pre-stage multiprocessor composed of a plurality of processors which code all pixels of input data and which may be expanded in parallel depending on the amount of processing to be performed, said pre-stage multiprocessor being capable of adding significant/insignificant block information and intraframe position information to block data;

a post-stage multiprocessor composed of a plurality of processors which code only significant blocks in said input data and which may be expanded in parallel depending on the amount of processing to be performed, said post-stage multiprocessor being capable of identifying significant blocks based on said significant/insignificant block information attached to said block data and of recomposing frames based on said position information attached to said block data;

a buffer means which, located between said pre-stage multiprocessor and said post-stage multiprocessor, stores coded data output by said pre-stage multiprocessor and which absorbs processing time differences between said two multiprocessors; and

an output control circuit means which adjusts a threshold value for control over the amount of coded data generated by said pre-stage multiprocessor in order to keep constant the output thereof, and which keeps constant the amount of processing performed by said post-stage multiprocessor by varying the number of said significant blocks depending on the quantity of data accumulated in said buffer means.