Method for backing up and erasing encryption keys

• US 5,131,040 A
• Filed: 02/28/1991
• Issued: 07/14/1992
• Est. Priority Date: 02/28/1991
• Status: Expired due to Fees

• Current Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Knapczyk, Stanley
• Primary Examiner(s): Tarcza, Thomas H.
• Assistant Examiner(s): CAIN, DAVID C
• Application Number:
  US07/662,143
• Time in Patent Office: 502 Days
• Field of Search: 380/50, 380/23, 380/21, 380/52
• US Class Current: 380/277
• CPC Class Codes: H04L 9/0894 Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage

Abstract

A method for backing up and erasing encryption keys that provides a backup power supply (110) so that keys stored in a memory (104) will not be lost inadvertently, while still permitting keys to be erased, either in response to a low battery condition in the absence of the main supply (101), or in response to an external key erase input (105).

Claims

1. For secure communication equipment having a first power source and a second power source, a method for ensuring that encryption keys stored in an associated memory are not compromised, the method comprising the steps of:

(a) sensing that the first power source output has fallen below a first predetermined threshold;

(b) sensing that the second power source output has fallen below a second predetermined threshold; and

(c) initiating a programming sequence to place the associated memory into a predetermined state.

2. The method in accordance with claim 1, wherein the first power source is derived from A.C. power.

3. The method in accordance with claim 1, wherein the second power source comprises a battery.

4. The method in accordance with claim 1, wherein the step (c) of initiating a programming sequence comprises powering up a microprocessor.

5. The method in accordance with claim 4, wherein the microprocessor executes a code sequence after power-up that writes predetermined values into the associated memory.

6. The method in accordance with claim 5, wherein the predetermined values are logic zeros.

7. The method in accordance with claim 4, wherein the step (c) of initiating a programming sequence further comprises removing power from the associated memory for a relatively short period of time.

8. The method in accordance with claim 7, wherein the step of removing power from the memory occurs at substantially the same time as the step of powering up the microprocessor.

9. A method for backing up and erasing encryption keys, the method comprising:

(a) monitoring output voltages of a first power source and a second power source; and

, in the event that the first power source falls below a predetermined threshold,

(a) entering a backup mode wherein only a memory device having encryption keys stored therein remains under power;

then, in response to the second power source falling below a predetermined threshold,

(a) initiating a power-up sequence that applies power to at least an associated microprocessor such that the microprocessor executes a code sequence that places the memory device into a predetermined state; and

, at substantially the same time that the power-up sequence is initiated,

(a) removing power from the memory device for a relatively short period of time.