Satellite receiver

• US 5,134,707 A
• Filed: 10/23/1990
• Issued: 07/28/1992
• Est. Priority Date: 10/26/1989
• Status: Expired due to Term

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Ozeki, Hiroaki, Kanno, Ippei, Sakashita, Seiji
• Primary Examiner(s): KUNTZ, CURTIS A
• Application Number:
  US07/600,988
• Time in Patent Office: 644 Days
• Field of Search: 455/10, 455/12, 455/52, 455/127, 455/343, 455/63, 455/67, 455/69, 455/5, 455/234, 455/254, 455/266
• US Class Current: 455/3.02
• CPC Class Codes: H03D 3/242 combined with means for controlling the frequency of a further oscillator, e.g. for negative frequency feedback or AFC
• CPC Class Codes: H03D 3/244 combined with means for obtaining automatic gain control
• CPC Class Codes: H04B 1/1638 Special circuits to enhance selectivity of receivers not otherwise provided for resonant circuits H03H

Abstract

Radio waves used in broadcasting and communications making use of broadcasting satellite and communication satellite are FM signals, and the frequency shift and exclusive bandwidth vary depending on the modulation signal. The satellite broadcasting receiver is designed to control the frequency shift so that the amplitude of the demodulation signal is constant, thereby making the bandwidth of the intermediate frequency filter, so as to be capable of receiving using just one filter. At this time, the frequency shift can be controlled continuously, from large to small one, in a predetermined exclusive bandwidth. When further expanding the frequency shift, since the exclusive bandwidth is extended, the noise electric power is increased and the receiving sensitivity is lowered as compared with the exclusive machine. Accordingly, when expanding the frequency shift, the noise bandwidth is narrowed in the PLL demodulator, thereby enhancing the receiving sensitivity.

Claims

1. A satellite broadcasting receiver for converting an FM signal into a fixed intermediate frequency by a mixing circuit also having an oscillation circuit connected thereto, demodulating the fixed intermediate frequency in a demodulation circuit after passing it through one filter, and delivering a signal from a demodulation signal processing circuit operatively connected to an output of the demodulation circuit, comprising:

an output level setting means for setting a predetermined amplitude of the demodulation signal;

a comparing means for comparing the amplitude of the demodulation signal with the predetermined amplitude;

a modulation driving means for supplying the demodulation signal to the oscillation circuit while continuously changing the amplitude and polarity of the demodulation signal in response to an output of the comparing means; and

an AGC voltage generating means for generating an AGC voltage for controlling the input level to the demodulator according to the polarity of the demodulation signal supplied to the oscillation circuit.

2. A satellite broadcasting receiver of claim 1, wherein:

the comparing means comprises;

a means for clamping the demodulation signal;

a means for slicing a part of the amplitude voltage;

a means for holding the peak voltage of the amplitude, and a means for comparing the held peak voltage with a preset voltage.

3. A satellite broadcasting receiver of claim 1, wherein:

the modulation driving means comprises a means for producing differential voltages which are in phase with and opposite phase from the demodulation signal, and a means for determining a synthetic ratio of the in-phase and opposite-phase differential voltages according the output from the comparing means.

4. A satellite broadcasting receiver of claim 1, wherein:

the AGC voltage generating means synthesizes an AGC detection voltage and the output from the comparing means.

5. A satellite broadcasting receiver of claim 4, wherein:

the AGC voltage generating means supplies a control voltage to a high frequency amplifier provided before the mixing circuit.

6. A satellite broadcasting receiver of claim 4, wherein:

the AGC voltage generating means supplies a control voltage to an intermediate frequency amplifier disposed after the mixing circuit.

7. A satellite broadcasting receiver of claim 1, wherein:

the output level setting means varies the preset amplitude according to a difference of the received modulation signal.

8. A satellite broadcasting receiver of claim 1, wherein:

at least one additional demodulation signal processing circuit is provided depending on a difference of the received modulation signal, said additional processing circuit being also operatively connecting an output of the demodulation circuit and delivering a signal which is different from the signal provided by the demodulation signal processing circuit.

9. A satellite broadcasting receiver of claim 8, further comprising a switch driving circuit for detecting a part of the demodulation signals from the demodulation signal processing circuits and for generating a switch changeover signal.

10. A satellite broadcasting receiver of claim 9, further comprising switch circuits disposed in the outputs of the demodulation circuits and in the output of the output level setting means, and when a desired demodulation signal is obtained, changeover action is effected by a driving signal from the switch driving circuit

11. A satellite broadcasting receiver of claim 8, wherein:

the demodulation signal processing circuit processes the conventional video signal and the analog frequency modulation sound carrier.

12. A satellite broadcasting receiver of claim 11, wherein:

the demodulation signal processing circuit generates a signal to the switch driving circuit depending on the amplitude level of the sound carrier.

13. A satellite broadcasting receiver of claim 8, wherein:

the demodulation signal processing circuit processes the conventional video signal and digital phase modulation sound carrier.

14. A satellite broadcasting receiver of claim 13, wherein:

the demodulation signal processing circuit generates a signal to the switch driving circuit by clock synchronization of the digital sound.

15. A satellite broadcasting receiver of claim 8, wherein:

the demodulation signal processing circuit processes the band-compressed video and sound signals.