×

Field effect device with polycrystalline silicon channel

  • US 5,135,888 A
  • Filed: 05/31/1990
  • Issued: 08/04/1992
  • Est. Priority Date: 01/18/1989
  • Status: Expired due to Term
First Claim
Patent Images

1. A method for fabricating a load element for a CMOS SRAM memory cell, comprising the steps of:

  • forming an n-channel field effect device in a semiconductor substrate, such field effect device having source/drain regions opposite a gate electrode and a channel under the gate electrode within the substrate;

    forming a gate oxide layer over the substrate;

    forming an opening through the gate oxide layer to expose an underlying conductive region;

    forming a layer of polycrystalline silicon over the gate oxide layer and the exposed underlying conductive region;

    forming p-type source/drain regions in the polycrystalline silicon layer;

    forming a p-channel region in the polycrystalline silicon layer between the p-type source/drain regions; and

    etching portions of the polycrystalline silicon layer to define an elongate p-channel element connecting the p-type source/drain regions, such element having a length substantially longer than a width of the element.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×