Image processor for sequential processing of successive regions of an image

• US 5,136,662 A
• Filed: 12/13/1989
• Issued: 08/04/1992
• Est. Priority Date: 12/13/1988
• Status: Expired due to Term

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Kitao, Yoshitaka, Nakahira, Hiroyuki, Sakiyama, Shiro, Maruyama, Masakatsu, Araki, Toshiyuki
• Primary Examiner(s): MOORE, DAVID K
• Application Number:
  US07/449,194
• Time in Patent Office: 965 Days
• Field of Search: 382/49, 382/41, 382/42, 382/27, 382/9, 382/37, 364/200 MS File, 364/900 MS File, 364/736, 364/715, 364/146, 358/166, 358/167, 358/452, 358/464, 358/447, 358/448
• US Class Current: 382/308
• CPC Class Codes: G06T 5/20 using local operators

Abstract

A local image processor is configured as a plurality of image processor elements each having a local image memory, and a single shift register circuit for supplying to the local image memories successive local images formed of an array of pixels of a source image. Each processor element includes a register holding a count value indicating the position within the source image of data that are currently being processed by that element, and the processor elements also include mutually interconnected registers whereby intermediate computation results obtained by one processor element can be utilized by another element during parallel processing operation.

Claims

1. A local image processor comprising:

local image shift register circuit means (20) for holding as local image data successive ones of a plurality of local images of a source image, each of said local images comprising an array having a predetermined size including a fixed number of pixels wherein said fixed number is independent of picture data associated with said local image, a plurality of local image processor elements (10A, 10B, 10C, 10D), and processor control circuit means (21) for controlling said plurality of local image processor elements and said local image shift register means, each of said local image processor elements comprising;

local image memory means (13) for periodically storing said local image data from said local image shift register circuit means;

counter register means (19) for holding a count value supplied from said processor control circuit means, said count value representing a number of times that successive local images have been stored into said local image memory means;

computation circuit means (40,

     41) for executing processing operations by utilizing local image data stored in said local image memory means and said count value of said counter register means;

program memory means (14) for storing an image processing program and for generating output signals during execution of said program, for controlling said processing operations and for selectively controlling transfer of said local image data from said local image memory means to said computation circuit means; and

program control circuit means (15) for controlling said program memory means.

2. A local image processor comprising:

local image shift register circuit means (20) for holding as local image data successive ones of a plurality of local images of a source image, each of said local images comprising an array of pixels,

a plurality of local image processor elements (10A, 10B, 10C, 10D), and

processor control circuit means (21) for controlling said plurality of local image processor elements and said local image shift register means,

each of said local image processor elements being operable in an operation mode in which a data value required in a processing operation at a specific time point during processing of a local image is generated as an intermediate processing result by a predetermined other one of said local image processor elements prior to said time point, and each of said processor elements comprising;

local image memory means (13) for periodically storing said local image data from said local image shift register circuit means;

computation circuit means (40,

     41) for executing processing operations by utilizing local image data stored in said local image memory means;

transfer register means (17) for receiving from said computation circuit means data values representing intermediate results of processing operations executed by said computation circuit means and for holding said data values, a first output terminal (B3) coupled to said transfer register means, for outputting said intermediate results to an external circuit receiving register means (18) for receiving from a transfer register means of said predetermined other one of said local image processor elements data values representing said intermediate processing results of processing operations executed thereby and for holding said data values, and a second output terminal (B5) coupled to said computation means for receiving a data value obtained as a final result of processing a local image;

program memory means (14) for storing an image processing program and for generating output signals during execution of said program for controlling said processing operations and for selectively controlling transfer of said local image data from said local image memory means to said computation circuit means; and

program control circuit means (15) for controlling said program memory means.

10. A local image processor as recited in claim 2 wherein said plurality of local image processor elements are arranged in an array, and wherein said first output terminal of one of said local image processor elements couples said one local image processor element to said predetermined other one of said local image processor elements, being adjacent thereto in said array, for providing thereto the intermediate processing results thereby enabling adjacent local image processor elements to process sequentially successive ones of said local images.

3. A local image processor comprising:

local image shift register circuit means (20) for holding as local image data successive ones of a plurality of local images of a source image, each of said local images comprising an array of pixels, a plurality of local image processor elements (10A, 10B, 10C, 10D), and processor control circuit means (21) for controlling said plurality of local image processor elements and said local image shift register means and for supplying to each of said local image processor elements a processing program restart address, each of said local image processor elements comprising;

local image memory means (13) for periodically storing said local image data from said local image shift register circuit means;

computation circuit means (40,

     41) for executing processing operations by utilizing local image data stored in said local image memory means;

program memory means (14) for storing an image processing program and for generating output signals during execution of said program for controlling said processing operations and for selectively controlling transfer of said local image data from said local image memory means to said computation circuit means; and

program control circuit means (15) for controlling said program memory means and for receiving said processing program restart address from said processor control circuit;

said program control circuit means being configured such as to supply to said program memory means a sequence of addresses extending from a fixed initial address during a first execution of said program, and to supply to said program memory means a sequence of addresses extending from said restart address, during each subsequent execution of said program.

4. A local image processor according to claim 3, in which a program step corresponding to said fixed initial address comprises an operation of initializing the contents of at least one register of said local image processor element.

5. A local image processor comprising:

local image shift register circuit means (20) for holding as local image data successive ones of a plurality of local images of a source image, each of said local images comprising an array of pixels,

a plurality of local image processor elements (10A, 10B, 10C, 10D),

each of said local image processor elements comprising;

local image memory means (13) for periodically storing said local image data from said local image shift register circuit means;

computation circuit means (40,

     41) for executing processing operations by utilizing local image data stored in said local image memory means;

program memory means (14) for storing an image processing program and for generating output signals during execution of said program for controlling said processing operations and for selectively controlling transfer of said local image data from said local image memory means to said computation circuit means; and

program control circuit means (15) for controlling said program memory means;

said local image processor further comprising processor control circuit means (21) for controlling said plurality of local image processor elements and said local image shift register means,

in which said processor control circuit means includes means for selectively producing first and second control signals to place said local image processor elements in first and second operation modes,

said first control signals from said processor control circuit means controlling said local image processor elements to operate in said first operation mode wherein successive ones of said local images are sequentially supplied from said shift register circuit means to respective ones of said local image processor elements to be sequentially processed thereby,

said second control signals from said processor control circuit means controlling said local image processor elements to operate in said second operation mode wherein each of successive local images is supplied in common to each of said local image processor elements to be concurrently processed thereby.

6. A local image processor comprising:

local image shift register circuit means (20) for holding as local image data successive ones of a plurality of local images of a source image, each of said local images comprising an array having a predetermined size including a fixed number of pixels wherein said fixed number is independent of picture data associated with said local image;

a plurality of local image processor elements (10A, 10B, 10C, 10D), and processor control circuit means (21) for controlling said plurality of local image processor elements and said local image shift register means, each of said local image processor elements comprising;

local image memory means (13) for periodically storing said local image data from said local image shift register circuit means;

counter register means (19) for receiving and holding a count value supplied from said processor control circuit means, representing a number of times that successive local images have been stored into said local image memory means;

computation circuit means (40,

     41) coupled to receive said count value from said counter register means, for executing processing operations by utilizing local image data stored in said local image memory means and said count value;

program memory means (14) for storing an image processing program and for generating output signals during execution of said program, for controlling said processing operations and for selectively controlling transfer of said local image data from said local image memory means to said computation circuit means; and

program control circuit means (15) for controlling said program memory means.

7. A local image processor comprising:

local image shift register circuit means (20) for holding as local image data successive ones of a plurality of local images of a source image, each of said local images comprising an array of pixels;

local image memory means (21) for periodically storing said local image data from said local image shift register circuit means;

computation circuit means (40,

     41) for executing processing operations by utilizing local image data stored in said local image memory means;

program memory means (14) for storing an image processing program and for generating output signals during execution of said program, for controlling said processing operations and for selectively controlling transfer of said local image data from said local image memory means to said computation circuit means;

processor control circuit means (21) for producing a processing program restart address;

program control circuit means for controlling said program memory means, and coupled to receive said restart address; and

said program control circuit means being configured to supply to said program memory means a sequence of addresses extending from a fixed initial address during a first execution of said program, and to supply to said program memory means a sequence of addresses extending from said restart address, during subsequent executions of said program.

8. A local image processor comprising:

local image shift register circuit means (20) for holding as local image data successive ones of a plurality of local images of a source image, each of said local images comprising an array of pixels, a plurality of local image processor elements (10A, 10B, 10C, 10D), and processor control circuit means (21) for controlling said plurality of local image processor elements and said local image shift register means, each of said local image processor elements comprising;

local image memory means (13) for periodically storing said local image data from said local image shift register circuit means;

computation circuit means (40,

     41) for executing processing operations by utilizing local image data stored in said local image memory means;

program memory means (14) for storing an image processing program and for generating output signals during execution of said program for controlling said processing operations and for selectively controlling transfer of data from said local image memory means to said computation circuit means; and

program control circuit means (15) for controlling said program memory means;

wherein said processor control circuit means and said program control circuit means operate to modify the image processing program executed by the computation circuit means of a local image processor element in accordance with a position of the local image processed thereby within the source image.

9. A local image processor comprising:

local image shift register circuit means (20) for holding as local image data successive ones of a plurality of local images of a source image, each of said local images comprising an array of pixels, a plurality of local image processor elements (10A, 10B, 10C, 10D), and processor control circuit means (21) for controlling said plurality of local image processor elements and said local image shift register means, each of said local image processor elements comprising;

local image memory means (13) for periodically storing said local image data from said local image shift register circuit means;

computation circuit means (40,

     41) for executing processing operations by utilizing local image data stored in said local image memory means;

program memory means (14) for storing an image processing program and for generating output signals during execution of said program for controlling said processing operations and for selectively controlling transfer of data from said local image memory means to said computation circuit means;

program control circuit means (15) for controlling said program memory means; and

means for providing information to said computation circuit means of a local image processor element for identifying a position of said source image being processed thereby within a sequence of source images, thereby enabling modification of the image processing program executed by the computation circuit means of a local image processor element in accordance with the position of said source image processed thereby within the sequence of source images.