Continuous on-line link error rate detector utilizing the frame bit error rate

• US 5,138,616 A
• Filed: 03/19/1990
• Issued: 08/11/1992
• Est. Priority Date: 03/19/1990
• Status: Expired due to Fees

• Current Assignee: United States Of America As Represented By The Secretary Of The Army (Government of the United States of America)
• Original Assignee: The United States Of America As Represented By The Secretary Of The Army
• Inventors: Wagner, Charles F. Jr., Coleman, James A.
• Primary Examiner(s): Smith, Jerry
• Assistant Examiner(s): Lebowitz, Henry C.
• Application Number:
  US07/495,553
• Time in Patent Office: 876 Days
• Field of Search: 371/5.1, 371/5.5, 371/47.1, 371/5.2
• US Class Current: 714/704
• CPC Class Codes: G06F 11/076 by exceeding a count or rate limit, e.g. word- or bit count limit
• CPC Class Codes: H04J 3/14 Monitoring arrangements for SDH/SONET rings H04J3/085
• CPC Class Codes: H04L 1/24 Testing correct operation
• CPC Class Codes: H04L 43/0847 Transmission error
• CPC Class Codes: H04L 43/16 Threshold monitoring

Abstract

The framing bit errors of a received digital communications signal are monitored and recorded. The framing bit error rate is determined and an audible alarm is sounded when the error rate exceeds a predetermined threshold value in a plurality of calculation modes. The framing bit error rate and the total framing bit errors detected over a predetermined fixed time period is also displayed. A link to a remote network monitor can be implemented for monitoring and displaying framing bit error rate at a remote location.

Claims

1. A method for determining the data bit error rate in a continuous digital stream divided into a plurality of data bit frames having one bit defined as a framing bit and consisting of a predetermined binary pattern which is identical for each framing bit when error free, comprising the steps of:

(a) detecting errors in the framing bit for a measurement cycle having a predetermined maximum time period;

(b) determining the framing bit error rate of the errors detected in at least one error rate calculating mode in response to the number of framing bit errors detected within said measurement cycle, said at least one error rate calculating mode comprising a plurality of modes including a first mode which is initiated when a first quantity of framing bit errors is detected, a second mode which is initiated when a second quantity of framing bit errors is detected, said second quantity being less than said first quantity and equal to or greater than a third quantity of detected framing bit errors, and a third mode which is initiated when a quantity of framing errors is detected which is equal to or less than a fourth quantity of framing bit errors, said fourth quantity being less than said third quantity;

(c) generating an alarm signal when the framing bit error rate exceeds a predetermined value; and

(d) displaying the value of said framing bit error rate,

said first mode comprising a short term mode including the steps of calculating the framing bit error rate for one said measurement cycle, and thereafter proceeding to step (c) only when said predetermined value is exceeded, said step of calculating the framing bit error rate for one said measurement cycle additionally including the step of comparing a quantity of framing bit errors detected in two consecutive said measurement cycles, and thereafter proceeding to step (d) when two consecutive quantities of detected framing bit errors are substantially the same.