Integrated bus bar/multilayer ceramic capacitor module

• US 5,142,439 A
• Filed: 08/28/1991
• Issued: 08/25/1992
• Est. Priority Date: 08/28/1991
• Status: Expired due to Fees

• Current Assignee: Alliedsignal Inc.
• Original Assignee: Alliedsignal Inc.
• Inventors: Scharf, John L., Lewis, Leon D., Rudich, Robert, Huggett, Colin E., Blazej, Daniel C.
• Primary Examiner(s): GRIFFIN, DONALD
• Application Number:
  US07/751,455
• Time in Patent Office: 363 Days
• Field of Search: 174/72 B, 361/306, 361/321, 361/328, 361/329, 361/330, 361/398, 361/407
• US Class Current: 361/321.2
• CPC Class Codes: H01G 4/38 Multiple capacitors, i.e. structural combinations of fixed capacitors
• CPC Class Codes: H02M 7/003 Constructional details, e.g. physical layout, assembly, wiring or busbar connections

Abstract

A high-voltage, low-volume capacitor module, having a minimal amount of inherent stray inductance, and being configured so as to allow its integration into an electrical system in a manner which minimizes any stray inductance introduced by interconnection wiring. This is accomplished by integrating the capacitor into the bus bars of the voltage convertor, thereby eliminating the need for separate interconnecting wiring and reducing the overall amount of stray inductance evident within the system in which the capacitor is employed.

Claims

1. A capacitor comprising:

a first conductive electrode;

a second conductive electrode;

capacitor means conductively attached between the first conductive electrode and the second conductive electrode;

a third conductive electrode;

means for electrically isolating the third conductive electrode from the second conductive electrode; and

conductive means electrically connecting the first conductive electrode to the third conductive electrode.

2. A capacitor as described by claim 1, wherein the means for electrically isolating the third conductive electrode from the second conductive electrode includes:

insulating means attached to the second conductive electrode; and

the third conductive electrode attached to the insulating means.

3. A capacitor as described by claim 1, wherein the capacitor means includes:

a plurality of multilayer ceramic chip capacitors.

4. A capacitor comprising:

a first conductive electrode having an upper and a lower surface;

a second conductive electrode having an upper and a lower surface, and configured for use as a power conducting bus bar within an electrical circuit;

a plurality of multilayer ceramic chip capacitors conductively attached between the lower surface of the first conductive electrode and the upper surface of the second conductive electrode;

an insulating means affixed to the lower surface of the second conductive electrode;

a third conductive electrode configured for use as a power conducting bus bar within an electrical circuit, and attached to the insulating means so that said third conductive electrode is electrically isolated for the second conductive electrode; and

a conductive means electrically connecting the first conductive electrode to the third conductive electrode.

5. A capacitor comprising:

a first conductive electrode;

a second conductive electrode;

a plurality of barium titanate multilayer ceramic chip capacitors conductively attached between the first conductive electrode and the second conductive electrode;

a third conductive electrode;

means for electrically isolating the third conductive electrode from the second conductive electrode; and

conductive means electrically connecting the first conductive electrode to the third conductive electrode.

6. A capacitor as described by claim 5, wherein the means for electrically isolating the third conductive electrode from the second conductive electrode includes:

insulating means attached to the second conductive electrode; and

the third conductive electrode attached to the insulating means.

7. A capacitor comprising:

a first conductive electrode having an upper and a lower surface;

a second conductive electrode having an upper and a lower surface, and configured for use as a power conducting bus bar within an electrical circuit;

a plurality of barium titanate multilayer ceramic chip capacitors conductively attached between the lower surface of the first conductive electrode and the upper surface of the second conductive electrode;

an insulating means affixed to the lower surface of the second conductive electrode;

a third conductive electrode configured for use as a power conducting bus bar within an electrical circuit, and attached to the insulating means so that said third conductive electrode is electrically isolated from the second conductive electrode; and

a conductive means electrically connecting the first conductive electrode to the third conductive electrode.