Detector of fast variation in the supply of integrated circuits

• US 5,144,515 A
• Filed: 12/07/1990
• Issued: 09/01/1992
• Est. Priority Date: 12/08/1989
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Original Assignee: Scs-Thomson Microelectronics SA
• Inventors: Breugnot, Freeric, Fruhauf, Serge
• Primary Examiner(s): Stephan, Steven L.
• Assistant Examiner(s): BERHANE, ADOLF D
• Application Number:
  US07/624,336
• Time in Patent Office: 634 Days
• Field of Search: 361/18, 361/56, 361/90, 361/91, 361/92, 361/111
• US Class Current: 361/18
• CPC Class Codes: G01R 19/12 Measuring rate of change
• CPC Class Codes: G06F 11/00 Error detection; Error correction; Monitoring error detection, correction or monitoring in information storage based on relative movement between record carrier and transducer G11B20/18; monitoring, i.e. supervising the progress of recording or reproducing G11B27/36; in static stores G11C29/00
• CPC Class Codes: G06K 19/0701 at least one of the integrated circuit chips comprising an arrangement for power management
• CPC Class Codes: G06K 19/073 Special arrangements for circuits, e.g. for protecting identification code in memory protection against unauthorised use of computer memory G06F12/14
• CPC Class Codes: G11C 5/143 Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels G11C5/148 takes precedence; Switching between alternative supplies G11C5/141 takes precedence

Abstract

Some integrated circuits need to be protected against malfunctioning due to the variations in the supply voltage Vcc. A detector of fast variations of the supply voltage is placed in the integrated circuit to interrupt or modify all or a part of the working of the general integrated circuit in the event of the occurrence of fast variation in Vcc. The detector includes a capacitor, a current limiter, a charging circuit, and a detection transistor. The current limiter is a transistor mounted as a diode. The charging circuit uses the supply voltage to charge the capacitor through the current limiter. The relatively stable voltage of the capacitor is applied to the gate of the detection transistor, which has a threshold voltage Vtp. The source of the detection transistor is connected to the voltage supply Vcc. If Vcc varies suddenly, the detector is made conductive. The assembly uses the difference between the threshold voltage Vtn of the current limiter and the threshold voltage Vtp of the detection transistor.

Claims

1. An integrated circuit having a supply voltage terminal for a supply voltage Vcc, a ground terminal, and a detector of fast variations in said supply voltage Vcc at said supply voltage terminal, said detector comprising:

a capacitor having first and second terminals, with said first terminal of said capacitor being connected to said ground terminal;

a first detection transistor having a gate, a source and a drain;

said source of said first detection transistor being connected to said supply voltage terminal, said drain of said first detection transistor being connected to an output terminal, and said gate of said first detection transistor being connected to said second terminal of said capacitor; and

a current limiting transistor having its gate connected to its drain, said current limiting transistor having a threshold voltage that is lower, in terms of absolute value, than the threshold voltage of said first detection transistor, said current limiting transistor being connected between said second terminal of said capacitor and said supply voltage terminal such that upon becoming conductive said current limiting transistor provides charging current to said capacitor to charge said capacitor to a voltage which is substantially Vcco-Vtn, where Vcco is a stable value of the supply voltage Vcc and Vtn is the threshold voltage of the current limiting transistor, thereby maintaining in a stable voltage supply mode a voltage drop between said supply voltage terminal and the gate of said first detection transistor which is the difference between the supply voltage and the voltage at the second terminal of said capacitor;

whereby, when the supply voltage Vcc varies swiftly from the stable voltage supply mode as compared with the charging time of said capacitor, the voltage drop between said supply voltage terminal and the gate of said first detection transistor increases and the conduction state of said first detection transistor changes when the thus increased voltage drop exceeds the threshold voltage of said first detection transistor;

whereby said detector can detect a fast variation in said supply voltage Vcc when the speed of the fast variation is faster than the charging rate of said capacitor.

2. An integrated circuit according to claim 1 further comprising a second detection transistor having its source connected to said second terminal of said capacitor and its gate connected to a voltage that varies directly with the supply voltage.

3. An integrated circuit according to claim 2 wherein said second detection transistor has the same type of conductivity as said first detection transistor, and wherein the threshold voltage of said second detection transistor is the same as that of said first detection transistor.

4. An integrated circuit according to claim 3 wherein said voltage that varies directly with the supply voltage Vcc is provided by fourth and fifth transistors, each of said fourth and fifth transistors having the same type of conductivity and the same threshold voltage as said current limiting transistor, said fourth and fifth transistors being connected as diodes in series between said supply voltage terminal and the gate of said second detection transistor to set up a voltage Vcc-2Vtn at the gate of said second detection transistor, where Vtn is the threshold voltage of each of said fourth and fifth transistors.

5. An integrated circuit according to claim 4, wherein said current limiting transistor lets the charge current through only in the direction towards the capacitor;

and wherein said detector further comprises a discharging circuit for discharging said capacitor.

6. An integrated circuit according to claim 5, further comprising first and second flip-flop circuits, with the drain of said first detection transistor being connected to an input of said first flip-flop circuit and the drain of said second detection transistor being connected to an input of said second flip-flop circuit, so that the turning on of said first detection transistor triggers said first flip-flop circuit and restores the state of said second flip-flop circuit and so that the turning on of said second detection transistor triggers said second flip-flop circuit and restores the state of said first flip-flop circuit.

7. An integrated circuit according to claim 6 further comprising a general circuit, wherein the outputs of said first and second flip-flop circuits are connected to said general circuit to modify the operation of said general circuit responsive to the outputs of said first and second flip-flop circuits.

8. An integrated circuit according to claim 1, wherein said current limiting transistor lets the charge current through only in the direction towards the capacitor;

and wherein said detector further comprises a capacitor discharging current source connected between said second terminal of said capacitor and said ground terminal for discharging said capacitor.

9. An integrated circuit according to claim 1, further comprising a flip-flop circuit, the drain of said first detection transistor being connected to an input of said flip-flop circuit, so that the turning on of said first detection transistor triggers said flip-flop circuit.

10. An integrated circuit according to claim 9 further comprising a general circuit, and wherein the output of said flip-flop circuit is connected to said general circuit to modify the operation of said general circuit responsive to the output of said flip-flop circuit.

11. An integrated circuit according to claim 10, wherein said current limiting transistor lets the charge current through only in the direction towards the capacitor;

and wherein said detector further comprises a discharging circuit for discharging said capacitor.

12. An integrated circuit according to claim 1 further comprising a general circuit, and wherein the operation of said general circuit is modifiable in response to the output of said first detection transistor.

13. An integrated circuit according to claim 1 further comprising a second detection transistor having its source connected to said second terminal of said capacitor and its gate connected to a voltage that varies directly with the supply voltage Vcc;

wherein said second detection transistor has the same type of conductivity as said first detection transistor;

wherein the threshold voltage of said second detection transistor is the same as that of said first detection transistor;

wherein said current limiting transistor lets the charge current though only in the direction towards the capacitor; and

wherein said detector further comprises a discharging circuit for discharging said capacitor.

14. An integrated circuit according to claim 1 further comprising a second detection transistor and first and second flip-flop circuits;

said first detection transistor having its source connected to said second terminal of said capacitor and its gate connected to a voltage that varies directly with the supply voltage Vcc;

said second detection transistor having the same type of conductivity as said first detection transistor;

the threshold voltage of said second detection transistor being the same as that of said first detection transistor;

the drain of said first detection transistor being connected to an input of said first flip-flop circuit and the drain of said second detection transistor being connected to an input of said second flip-flop circuit, so that the turning on of said first detection transistor triggers said first flip-flop circuit and restores the state of said second flip-flop circuit and so that the turning on of said second detection transistor triggers said second flip-flop circuit and restores the state of said first flip-flop circuit.

15. An integrated circuit according to claim 1 further comprising a second detection transistor having its source connected to said second terminal of said capacitor and its gate connected to a voltage that varies directly with the supply voltage Vcc, wherein said second detection transistor has the same type of conductivity as said first detection transistor, wherein the threshold voltage of said second detection transistor is the same as that of said first detection transistor;

and a general circuit, wherein the operation of said general circuit is modifiable responsive to the outputs of said first and second detection transistors.

16. An integrated circuit according to claim 1 further comprising a second detection transistor having its source connected to said second terminal of said capacitor, fourth and fifth transistors, said fourth transistor having the same type of conductivity and the same threshold voltage as said fifth transistor, said fourth and fifth transistors being connected as diodes in series between said supply voltage terminal and the gate of said second detection transistor to set up a voltage Vcc-2Vtn at the gate of said second detection transistor, where Vtn is the threshold voltage of each of said fourth and fifth transistors.

17. An integrated circuit according to claim 16 further comprising a general circuit, wherein the operation of said general circuit is modifiable responsive to the outputs of said first and second detection transistors.

18. An integrated circuit according to claim 1 further comprising a second detection transistor having its source connected to said second terminal of said capacitor and its gate connected to a voltage that varies directly with the supply voltage;

wherein said current limiting transistor lets the charge current through only in the direction towards the capacitor; and

wherein said detector further comprises a discharging circuit for discharging said capacitor.

19. An integrated circuit according to claim 1, further comprising a second detection transistor having its source connected to said second terminal of said capacitor and its gate connected to a voltage that varies directly with the supply voltage Vcc, first and second flip-flop circuits, the drain of said first detection transistor being connected to an input of said first flip-flop circuit and the drain of said second detection transistor being connected to an input of said second flip-flop circuit, so that the turning on of said first detection transistor triggers said first flip-flop circuit and restores the state of said second flip-flop circuit and so that the turning on of said second detection transistor triggers said second flip-flop circuit and restores the state of said first flip-flop circuit.

20. An integrated circuit according to claim 19 further comprising a general circuit, and a modification circuit to modify the operation of components of said general circuit responsive to the outputs of said first and second flip-flop circuits.

21. An integrated circuit according to claim 1 wherein said current limiting transistor has a type of conductivity which is opposite to that of said first detection transistor, wherein said source of said first detector transistor and the drain of said current limiting transistor are connected to said supply voltage terminal.

22. A process for detecting fast variations in the supply voltage at a supply voltage terminal of an integrated circuit even when the thus varied supply voltage does not exceed the range of nominal values of said supply voltage, said process comprising:

applying said supply voltage to a current limiting transistor and a first detection transistor, wherein said current limiting transistor has a threshold voltage that is lower, in terms of absolute value, than the threshold voltage of said first detection transistor;

providing a current flow through said current limiting transistor to a first terminal of a capacitor upon said supply voltage exceeding the threshold voltage of aid current limiting transistor to charge said capacitor to a voltage which is substantially Vcco-Vtn, where Vcco is the stable value of the supply voltage and Vtn is the threshold voltage of the current limiting transistor;

applying the voltage at said first terminal of said capacitor to the gate of said first detection transistor;

maintaining, in a stable voltage supply mode, the capacitor charged with a voltage at said first terminal of said capacitor which is substantially Vcco-Vtn, where Vcco is the stable value of the supply voltage and Vtn is the threshold voltage of the current limiting transistor, thereby maintaining at the gate of said first detection transistor a voltage which is the difference between the supply voltage and the voltage at the first terminal of said capacitor;

whereby, when the supply voltage varies swiftly from the stable voltage supply mode as compared with the charging time of said capacitor, the voltage drop between said supply voltage terminal and the gate of said first detection transistor increases and the conduction state of said first detection transistor changes when the thus increased voltage drop exceeds the threshold voltage of said first detection transistor; and

modifying the operation of a portion of the integrated circuit when said first detection transistor changes state after a stable voltage supply mode has been achieved.

23. A process in accordance with claim 22 wherein the step of modifying the operation comprises barring at least a part of the functioning of the integrated circuit.

24. A process in accordance with claim 22 further comprising applying said supply voltage across a serially connected combination of two transistors and a permanent current source, with the gate of a second detection transistor being connected to the junction between the permanent current source and the two serially connected transistors, and the current path of said second detection transistor being connected to said first terminal of said capacitor.