Encapsulation of electronic modules

• US 5,147,982 A
• Filed: 04/10/1991
• Issued: 09/15/1992
• Est. Priority Date: 04/07/1989
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Original Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Inventors: Steffen, Francis
• Primary Examiner(s): Picard, Leo P.
• Assistant Examiner(s): LEDYNH, BOT L
• Application Number:
  US07/683,071
• Time in Patent Office: 524 Days
• Field of Search: 174/52.2, 174/52.4, 357/70, 357/72, 357/73, 357/80, 361/398, 361/401, 361/403, 361/404, 361/406, 361/408, 361/421, 361/388, 361/405
• US Class Current: 174/521
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48245 the item being metallic
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/24 solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 23/49855 for flat-cards, e.g. credit cards cards per se G06K19/00
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/00015 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01028 Nickel [Ni]
• CPC Class Codes: H01L 2924/01057 Lanthanum [La]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: Y10T 29/49121 : Beam lead frame or beam lead device

Abstract

The disclosure concerns the encapsulation of integrated circuit chips, notably with a view to their being incorporated in a chip card. The encapsulation method comprises the formation of a pre-punched metallic conductive grid, the formation of a strip of pre-perforated plastic material, the transfer of a strip to the grid, the positioning of an integrated circuit chip in a perforation of the strip, and the formation of electrical connections between the chip and zones of the grid located in perforations of the strip. The perforations of the strip and the punched slots of the grid are arranged so that the strip covers and blocks all the interstices between conductors of the grid in the useful region corresponding to a module to be made. When a protecting resin is laid, it is confined and does not leak through the interstices of the grid. A plastic or metal ring defines the heightwise dimension of the micromodule.

Claims

1. A micromodule for the encapsulation of integrated circuits, comprising a punched metal grid, a strip of perforated dielectric screen transferred to the punched grid, the perforations of the screen covering conductive zones of the punched grid without covering interstices between these zones, an integrated circuit chip being placed in a perforation of the screen and being electrically connected to conductive zones located in other perforations of the strip.

2. A micromodule according to claim 1, comprising an transferred ring surrounding the chip and its connections, and a protecting material filling the space demarcated by the ring and the screen.

9. An encapsulation according to claim 1 or 3, wherein the grid has a conductive central zone 12, on which is positioned the integrated circuit chip, and peripheral conductive zones 14, surrounding this central zone, said zones being separated from one another by interstices 16;

said strip perforations including a central perforation 22, surrounding said integrated circuit chip, and peripheral perforations 24, for access to connection terminals on the peripheral conductive zones 14;

said central perforation 22, and central zone 12, being positioned relative to each other with the central perforation 22, on top of the central zone 12, without comming on top of an interstice 16 of the punch grid; and

said central hole 22 being smaller than the central zone 12.

10. An encapsulation according to claim 9 wherein each peripheral perforation 24, faces an end of a conductive zone 14.

11. An encapsulation according to claim 9 wherein all the interstices of the said grid are covered by said strip in the region of the chip and connections.

3. An encapsulation for an integrated circuit, comprising a prepunched metal conductive grid, a strip of preperforated dielectric screen attached to the grid, an integrated circuit chip positioned in a perforation of the stip, and electrical connections between the chip and zones of the grid located in perforations of the strip.

4. An encapsulation according to claim 3 wherein the perforations of the strip and punched slots of the grid are located such that the strip covers and blocks all interstices between the conductive metal of the grid in a region in which a chip is positioned.

5. An encapsulation according to claim 3 or 4 further comprising a protecting material covering the chip and the connections in the perforations of the strip.

6. An encapsulation according to claim 5 further comprising a protecting ring surrounding the chip and its connections, this ring being filled with the protecting material.

7. An encapsulation according to claim 6 wherein said protecting ring comprises a ring-shaped protuberance integrated into the strip.

8. An encapsulation according to claim 4, 5, or 6 wherein the protecting material is a thermoplastic or thermosetting resin.

12. An encapsulation according to claim 3 wherein a side of the grid opposite to a side adjacent to the strip, has contact surfaces providing access to the integrated circuit from an exterior of the encapsulation, whereby said encapsulation is particularly applicable for incorporation into a chip card.

13. An encapsulation according to claim 6 wherein said ring surrounds a plurality of chips and connecting wires to said chips, and wherein an upper edge of said ring extends beyond a height of the chips and said connecting wires.