Digital-to-analog converter using pulse-width modulation

• US 5,148,168 A
• Filed: 04/30/1991
• Issued: 09/15/1992
• Est. Priority Date: 05/16/1990
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Ueki, Masaaki, Masuda, Toshihiko
• Primary Examiner(s): Williams, Howard L.
• Application Number:
  US07/693,373
• Time in Patent Office: 504 Days
• Field of Search: 341/53, 341/144, 341/152, 375/22, 307/265, 307/269, 332/109
• US Class Current: 341/152
• CPC Class Codes: H03M 1/822 using pulse width modulation

Abstract

A digital-to-analog converter utilizing a PWM system for converting input digital data to PWM signals and finally to an analog signal divides the sampling period of the input digital data into an even number of sampling periods and produces PWM signals with equal pulse widths corresponding to the input digital data each divided sampling period, whereby a simple structure is provided to reduce harmonic distortion and obtain a high quality analog signal.

Claims

1. A digital-to-analog converter for converting input digital data having a predetermined sampling period into an analog signal, comprising:

pulse-width modulated signal generation means for generating a pulse-width modulated signal having a pulse width corresponding to said input digital data; and

low-pass filter means for eliminating high-frequency components of said pulse-width modulated signal to thereby output said analog signal;

wherein

said pulse-width modulated signal generation means is operative to divide the sampling period of said input digital data into an integral even number of divided sampling periods and to generate a pulse-width modulated signal in each divided sampling period, said sampling period including at least two pulses having equal pulse widths symmetrically arranged about a point a predetermined interval from the center of said sampling period and corresponding to said input digital data.

2. A digital-to-analog converter according to claim 1, wherein said pulse-width modulated signal generation means comprises:

ROM means coupled to receive the input digital data as address data for outputting parallel data representing the at least two pulses of said pulse-width modulated signal in a respective one of said sampling periods; and

parallel-to-serial converter means for converting said parallel data to a serial data signal corresponding to the at least two pulses of said pulse-width modulated signal.

3. A digital-to-analog converter according to claim 2, wherein said pulse-width modulated signal generation means further comprises:

buffer means and inverter means arranged in parallel and having inputs commonly coupled with the parallel-to-serial converter means for providing said serial data signal and an inverted version of said serial data signal, respectively, at corresponding outputs thereof; and

differential amplifier means for providing said pulse-width modulated signal at an output thereof by producing said pulse-width modulated signal as a difference between said serial data signal and said inverted version of said serial data signal;

the output of said differential amplifier means being coupled to said low-pass filter means to supply said pulse-width modulated signal thereto.

4. A digital-to-analog converter according to claim 1, wherein said pulse-width modulated signal generation means comprises:

first ROM means coupled to receive said input digital data as address data for outputting first parallel data representing said pulse-width modulated signal;

second ROM means coupled to receive said input digital data as address data for outputting second parallel data representing an inverted version of said first parallel data;

first parallel-to-serial converter means for converting said first parallel data to serial data supplied at an output thereof and representing said pulse-width modulated signal;

second parallel-to-serial converter means for converting said second parallel data to serial data supplied at an output thereof and representing an inverted version thereof; and

differential amplifier means having a noninverting input and an inverting input coupled with respective ones of the output of said first parallel-to-serial converter means and the output of said second parallel-to-serial converter means for providing said pulse-width modulated signal at an output thereof, wherein

the output of said differential amplifier means is coupled with said low-pass filter means to supply said pulse-width modulated signal thereto.