Modular expansion bus configuration

• US 5,148,389 A
• Filed: 04/05/1988
• Issued: 09/15/1992
• Est. Priority Date: 04/05/1988
• Status: Expired due to Term

• Current Assignee: Unisys Corporation
• Original Assignee: Convergent Technologies, Inc. (Secured Digital Applications, Inc.)
• Inventors: Hughes, Jodie K.
• Primary Examiner(s): Shaw, Gareth D.
• Assistant Examiner(s): Napiorkowski, Maria
• Application Number:
  US07/177,704
• Time in Patent Office: 1,624 Days
• Field of Search: 364/200 MS File, 364/900 MS File
• US Class Current: 710/9
• CPC Class Codes: G06F 12/0676 the address being position dependent

Abstract

A technique for assigning addresses to modular units connected to a computer system expansion bus. A unique address is initially generated in a controller module attached to the expansion bus and is transferred to the first one of several serially coupled expansion modules. The first modules receives the unique address which now identifies that module and generates a new unique address from the received unique address. The new unique address is transferred to the next expansion module which uses the received address to identify itself. The steps are repeated until each expansion module has received a unique address to identify itself. In each module, a Read Only Memory (ROM) is used to receive the unique address from the previous module and to generate a new address for the next module.

Claims

1. A modular computer system comprising:

a controller module;

a bus connected to said controller module;

a plurality of serially connected expansion modules coupled to said bus following said controller module,

each said expansion module having address input means for receiving a bus address from a preceding module, means for generating a next module address from the address supplied to the address input means, and address output means for supplying the next module address to the bus for receipt by a next succeeding module,

said controller module including means for generating the bus address of a first one of said plurality of serially connected modules, and address output means for coupling the first module address to the bus for receipt by said first one of said plurality of serially connected modules whereby the address of the first one of said modules is generated by said controller and the addresses of the remaining ones of said expansion modules are each generated by a preceding expansion module.

2. The invention of claim 1 wherein said means for generating the next module address includes a memory device.

3. The invention of claim 2 wherein said memory device comprises a read only memory unit having an address input terminal coupled to said expansion module address input means and an output terminal coupled to said expansion module address output means.

4. A module computer system comprising:

a system controller;

a main bus coupled to said system controller;

a plurality of serially connected processor modules coupled to said main bus;

an expansion controller module coupled to one of said processor modules;

an expansion bus coupled to said expansion controller module; and

a plurality of serially connected expansion modules coupled to said expansion bus,

each said expansion module having address input means for receiving a bus address from a preceding module, means for generating a next module address from the address supplied to the address input means, and address output means for supplying the next module address to the bus for receipt by a next succeeding expansion module,

said expansion controller module including means for generating the bus address of a first one of said plurality of serially connected expansion modules, and address output means for supplying the first expansion module address to the expansion bus for receipt by said first one of said plurality of serially connected expansion modules, whereby the address of the first one of said expansion modules is generated by said expansion controller module and the address of each remaining one of said expansion modules is generated by a preceeding expansion module.

5. The invention of claim 4 wherein said means for generating the next module address includes a memory device.

6. The invention of claim 5 wherein said memory device comprises a read only memory unit having an address input terminal coupled to said expansion module address input means and an address output terminal coupled to said expansion module address input means.

7. A method of assigning a bus address to each expansion module in a computer system having a controller coupled by an expansion bus to a plurality of serially coupled expansion modules, said method comprising the steps of:

(a) generating in the controller an address for a first expansion module in the system;

(b) supplying the address for the first expansion module from the controller to the first expansion module;

(c) generating at the first expansion module an address for a next module from the address supplied to the first module;

(d) supplying the address generated in step (c) to the next module;

(e) generating at the next module an address for a subsequent module from the address supplied to said next module;

(f) supplying the address generated in step (e) to the subsequent module; and

(g) repeating said steps of (e) generating and (f) supplying at successive modules until all modules have been supplied with an address.

8. The invention of claim 7 wherein each expansion module includes a subsequent module address generator;

and wherein said step (d) of generating is performed by causing the subsequent module address generator in said next module to generate said subsequent module address from the address supplied in step (c).