General purpose, reconfigurable system for processing serial bit streams

• US 5,150,048 A
• Filed: 09/12/1990
• Issued: 09/22/1992
• Est. Priority Date: 09/12/1990
• Status: Expired due to Term

• Current Assignee: Agilent Technologies, Inc.
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Siefers, John E., McAuliffe, Robert E., Cain, Christopher B.
• Primary Examiner(s): Wieder, Kenneth A.
• Assistant Examiner(s): Burns, William
• Application Number:
  US07/581,604
• Time in Patent Office: 741 Days
• Field of Search: 324/73.1, 324/158 R, 341/50, 371/15.1, 371/224, 371/22.6
• US Class Current: 714/724
• CPC Class Codes: G01R 31/31905 Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
• CPC Class Codes: G01R 31/31919 Storing and outputting test patterns G01R31/31924 takes precedence; arithmetic and random test patterns generator
• CPC Class Codes: G01R 31/31921 using compression techniques, e.g. patterns sequencer

Abstract

Disclosed is a system for testing serial communications electrical circuit boards which interfaces to a board being tested through a plurality of serial channels. The system contains a plurality of personality modules, each of which can interface directly to a channel. A personality module will perform level shifting, data encoding/decoding, line termination, and clock/framing extraction as needed for a particular serial protocol. The system also contains one or more reconfigurable bit processors which may be connected together in a building block fashion to perform low-level processing on serial data received from or sent to a personality module. One of a plurality of serial test sequencers receives or sends data from/to a reconfigurable bit processor; provides a user programmable apparatus to control the application and reception of test patterns to and from a channel; and interfaces to the user through a system controller.

Claims

1. A system for testing a serial bit stream circuit comprising:

personality module means for connecting said system to said circuit and for converting a serial bit stream signal format of said circuit to a common bit stream signal format, wherein said serial bit stream signal format has more than two levels and said common bit stream signal format is a binary format;

reconfigurable bit processing means for converting between said common bit stream format and a converted bit stream signal format;

bus means connecting said personality means and said reconfigurable bit processing means for conducting said common bit stream signal comprising serial data transfer means, and clock transfer means; and

programmable serial test sequencing means connected to said reconfigurable bit processing means for testing said serial bit stream circuit and for identifying said circuit as correctly functioning or rejecting said circuit as defective.

2. The system of claim 1 wherein said reconfigurable bit processing means is programmable.

3. The system of claim 2 further comprising means for transferring programming information from said programmable serial test sequencing means to said reconfigurable bit processing means.

4. The system of claim 3 wherein said means for transferring programming information transfers said programming information serially.

5. The system of claim 1 wherein said personality module means is programmable.

6. The system of claim 5 further comprising means for transferring programming information from said programmable serial test sequencing means to said personality module means.

7. The system of claim 1 wherein said personality module means may be interchanged with a second personality module means for testing a different serial bit stream circuit.

8. The system of claim 1 wherein data within said common bit stream signal is in a serial format.

9. A system for testing a plurality of serial bit stream circuits comprising:

a plurality of personality module means for connecting said system to said circuits and for converting at least one serial bit stream signal format from said circuits to at least one common bit stream signal format, wherein said serial bit stream signal format has more than two levels and said common bit stream signal format is a binary format;

a plurality of reconfigurable bit processing means for converting between said common bit stream signal format and a converted serial bit stream signal format;

bus means connecting said plurality of personality means and said plurality of reconfigurable bit processing means for conducting said common bit stream signal comprising

a plurality of serial data transfer means, one for each of said plurality of personality means, and

a plurality of clock transfer means, one for each of said personality means; and

a plurality of programmable serial test sequencing means, connected to at least one of said plurality of reconfigurable bit processors, for testing at least one of said serial bit stream circuits and for passing or rejecting said circuits.

10. The system of claim 9 wherein each of said plurality of reconfigurable bit processing means is individually programmable.

11. The system of claim 10 further comprising means for transferring programming information from at least one of said programmable serial test sequencing means to said plurality of reconfigurable bit processing means.

12. The system of claim 11 wherein said means for transferring programming information transfers said programming information serially.

13. The system of claim 9 wherein each of said personality module means is individually programmable.

14. The system of claim 13 further comprising means for transferring programming information from said programmable serial test sequencing means to said personality module means.

15. The system of claim 9 wherein data within said common bit stream signal is in a serial format.

16. The system of claim 9 further comprising programmable means for interconnecting said plurality of personality modules;

17. The system of claim 9 further comprising programmable means for interconnecting said plurality of reconfigurable bit processors.

18. The system of claim 9 further comprising means for interconnecting said plurality of programmable serial test sequencers.

19. The system of claims 16, 17 or 18 further comprising programmable means for performing parallel simultaneous testing of a plurality of serial bit stream circuits.

20. The system of claim 9 wherein each of said personality module means may be interchanged with other personality module means for testing a different serial bit stream circuits.