Input protection circuit for CMOS devices

• US 5,150,187 A
• Filed: 03/05/1991
• Issued: 09/22/1992
• Est. Priority Date: 03/05/1991
• Status: Expired due to Fees

• Current Assignee: VLSI Technology, Inc. (Koninklijke Philips N.V.)
• Original Assignee: VLSI Technology, Inc. (Koninklijke Philips N.V.)
• Inventors: Huang, Eddy C.
• Primary Examiner(s): Lee, John D.
• Assistant Examiner(s): Wise, Robert E.
• Application Number:
  US07/665,386
• Time in Patent Office: 567 Days
• Field of Search: 357/43, 357/46
• US Class Current: 257/359
• CPC Class Codes: H01L 27/0251 for MOS devices

Abstract

A shared protection circuit protects an MOS circuit, herein called a chip, from the destructive effects of electrostatic discharges conducted by any of the circuits input/output pins. The shared protection circuit is coupled to the high and low voltage source nodes used by the entire chip. In a preferred embodiment which protects against positive voltage electrostatic discharges, each input/output pin of the chip node is coupled by a diode to the high voltage source node so that a positive voltage transient on any input/output node will be transmitted to the high voltage source node. A Darlington pair of parasitic bipolar transistors conduct charge from the high voltage source node to the low voltage source node when turned on. A bias circuit turns on the Darlington pair of parasitic bipolar transistors when a positive voltage transient having at least a predefined magnitude occurs on the high voltage source node. As a result, the shared protection circuit will drain current from any input/output node, via the high voltage source node, when a positive voltage transient occurs thereon. The bias circuit also automatically turns off the Darlington pair of parasitic bipolar transistors after it has discharged excess voltage from the high voltage source node.

Claims

1. In an MOS semiconductor circuit, a shared protection circuit coupled to a plurality of input/output pads and to other circuitry in the MOS semiconductor circuit, said shared protection circuit comprising:

first and second voltage source nodes, one of said voltage sources node comprising a high voltage source node and the other comprising a low voltage source node;

a multiplicity of diodes, each coupling a distinct input/output node to said first voltage source node so that a transient voltage of a predefined polarity on any input/output node is transmitted to said first voltage source node; and

a Darlington pair of parasitic bipolar transistors, coupled to said first and second voltage source nodes so as to conduct charge from said first voltage source node to said second voltage source node when a transient voltage of said predefined polarity having at least a predefined magnitude occurs on said first voltage source node;

whereby said shared protection circuit will drain current from any of said input/output nodes, via said first voltage source node, when a transient voltage of said predefined polarity occurs thereon.

2. The shared protection circuit of claim 1, wherein said circuit is formed in a semiconductor substrate of a first type and said Darlington pair of parasitic bipolar transistors comprise vertical bipolar structures formed in a well of semiconductor material of opposite type.

3. The shared protection circuit of claim 1, including a bias circuit for turning on said Darlington pair of parasitic bipolar transistors when a transient voltage of said predefined polarity having at least said predefined magnitude occurs on said first voltage source node;

said bias circuit including means for automatically turning off said Darlington pair of parasitic bipolar transistors after said Darlington pair of parasitic bipolar transistors has drained current from said first voltage source node.

4. In an MOS semiconductor circuit, a shared protection circuit coupled to a plurality of input/output pads and to other circuitry in the MOS semiconductor circuit, said shared protection circuit comprising:

a high voltage source node and a low voltage source node;

a multiplicity of diodes, each coupling a distinct input/output node to said high voltage source node so that a positive voltage transient on any input/output node is transmitted to said high voltage source node; and

a Darlington pair of parasitic bipolar transistors, coupled to said high voltage source node and a low voltage source node so as to conduct charge from said high voltage source node to said low voltage source node when a positive voltage transient occurs on said high voltage source node;

whereby said shared protection circuit will drain current from any of said input/output nodes, via said high voltage source node, when a positive voltage transient occurs thereon.

5. The shared protection circuit of claim 4, wherein said circuit is formed in a semiconductor substrate of a first type and said Darlington pair of parasitic bipolar transistors comprise vertical bipolar structures formed in a well of semiconductor material of opposite type.

6. The shared protection circuit of claim 4, including a bias circuit for turning on said Darlington pair of parasitic bipolar transistors when a positive voltage transient having at least a predefined magnitude occurs on said high voltage source node;

said bias circuit including means for automatically turning off said Darlington pair of parasitic bipolar transistors after said Darlington pair of parasitic bipolar transistors has drained current from said high voltage source node.