Receiver capable of removing both intersymbol interference and frequency offset

• US 5,150,380 A
• Filed: 10/17/1990
• Issued: 09/22/1992
• Est. Priority Date: 10/18/1989
• Status: Expired due to Term

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Okanoue, Kazuhiro
• Primary Examiner(s): Safourek, Benedict V.
• Assistant Examiner(s): GHEBRETINSAE, TEMESGHEN
• Application Number:
  US07/597,693
• Time in Patent Office: 706 Days
• Field of Search: 375/12, 375/14, 375/16, 375/96, 375/97, 375/101, 329/318, 364/424.2
• US Class Current: 375/236
• CPC Class Codes: H04L 25/03133 with a non-recursive structure H04L25/03127 takes precedence

Abstract

In a receiver responsive to a reception signal subjected to an intersymbol interference and a frequency offset, the reception signal is delivered to a matched filter having a filter characteristic matched with a transmission path and filtered into a filter output signal accompanied by the frequency offset. The filter output signal is sent to a frequency offset estimation circuit to produce an estimation signal representative of an estimation value of the frequency offset. An equalizer is supplied with the estimation signal and a selected one of the reception signal and the filter output signal to equalize the frequency offset and the intersymbol interference.

Claims

1. A receiver supplied with a reception signal which is transmitted through a transmission path and which is subjected to an intersymbol interference and a frequency offset related to said intersymbol interference said receiver producing an output signal substantially exempted from said intersymbol interference and said frequency offset and comprising:

a matched filter which has a filter characteristic matched with said transmission path and which is supplied with said reception signal for producing a filter output signal,

frequency offset estimating means supplied with said filter output signal for estimating said frequency offset from said filter output signal to produce an estimation signal representative of said frequency offset, and

equalizing means supplied with said reception signal and said estimation signal for equalizing said intersymbol interference and said frequency offset of said reception signal on the basis of said estimation signal to produce said output signal.

2. A receiver as claimed in claim 1, wherein said equalizing means comprises:

accumulating means successively supplied with said estimation for successively accumulating said estimation signal to produce an accumulation signal representative of accumulation of said estimation signal;

phase rotating means responsive to said reception signal and said accumulation signal for rotating a phase of said reception signal on the basis of said accumulation signal to produce a phase rotated signal; and

linear equalizing means responsive to said phase rotated signal and said reception signal for linearly equalizing said phase rotated signal to produce said output signal.

3. A receiver supplied with a reception signal which is transmitted through a transmission path and which is subjected to an intersymbol interference and a frequency offset related to said intersymbol interference, said receiver producing an output signal substantially exempted from said intersymbol interference and said frequency offset and comprising:

a matched filter which has a filter characteristic matched with said transmission path and which is supplied with said reception signal for producing a filter output signal,

frequency offset estimating means supplied with said filter output signal for estimating said frequency offset to produce an estimation signal representative of said frequency offset, and

equalizing means supplied with said filter output signal and said estimation signal for equalizing said intersymbol interference and said frequency offset to produce said output signal.

4. A receiver as claimed in claim 3, wherein said equalizing means comprises:

accumulating means successively supplied with said estimation signal for successively accumulating said estimation signal to produce an accumulation signal representative of accumulation of said estimation signal;

phase rotating means responsive to said reception signal and said accumulation signal for rotating a phase of said reception signal on the basis of said accumulation signal to produce a phase rotated signal; and

decision feedback equalizing means responsive to said phase rotated signal and said filter output signal for equalizing said phase rotated signal to produce said output signal.

5. A receiver supplied with a reception signal which is transmitted through a transmission path and which is subjected to an intersymbol interference and a frequency offset, said receiver deriving an offset signal representative of said frequency offset from said reception signal and comprising:

a matched filter supplied with a reception signal for producing a filter output signal,

square calculation means supplied with said filter output signal for calculating a square of said filter output signal to produce a square signal representative of said square of the filter output signal,

average calculation means for calculating an average of said square signal to produce an average signal representative of said average of the square signal,

a counter for counting said average signal to produce a count signal representative of a count of said average signal,

an argument detection circuit supplied with said average signal for detecting an argument of said average signal to successively produce an argument signal representative of said argument,

signal control means operable in cooperation with said counter and said argument detection circuit for producing first and second ones of said argument signals when said count becomes equal to a first constant value N1 and a second constant value N2 greater than N1, respectively,

memory means for memorizing said first and second ones of the argument signals as first and second memorized argument signals, respectively,

a difference detection circuit for calculating a difference between said first and said second memorized argument signals to produce a difference signal representative of said difference, and

a dividing circuit for dividing said difference signal by a difference between said first and said second constant values to produce said offset signal.