Image sensor having an array of operative and dummy bipolar transistors and pairs of pixel selecting switches connected thereto

• US 5,151,587 A
• Filed: 01/04/1991
• Issued: 09/29/1992
• Est. Priority Date: 01/10/1990
• Status: Expired due to Term

• Current Assignee: Seiko Instruments Incorporated (Seiko Group)
• Original Assignee: Seiko Instruments Incorporated (Seiko Group)
• Inventors: Machida, Satoshi, Kawahara, Yukito, Mukainakano, Hiroshi
• Primary Examiner(s): Nelms, David C.
• Assistant Examiner(s): DAVENPORT, TERESA
• Application Number:
  US07/637,489
• Time in Patent Office: 634 Days
• Field of Search: 250/208.1, 250/214 C, 358/213.16, 358/213.12, 358/213.31
• US Class Current: 250/208.1
• CPC Class Codes: H01L 27/14681 Bipolar transistor imagers
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 25/701 Line sensors
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors

Abstract

The image sensor is comprised of an array of operative bipolar transistors. Another array of optically shielded dummy bipolar transistors are formed adjacently to the operative bipolar transistors. Reset switches are connected to base regions of the operative and dummy bipolar transistors so as to reduce variation in dark image output, to ensure linearity of output signal, and to eliminate image storage.

Claims

1. An image sensor comprising:

an array of operative bipolar transistors for effecting photo-electric conversion of incident light;

another array of dummy bipolar transistors optically shielded from incident light and disposed adjacently and correspondingly to the operative bipolar transistors to constitute pairs of the operative and dummy bipolar transistors;

pairs of reset switches connected to the corresponding pairs of the transistors at their base regions to concurrently reset each pair of the operative and dummy bipolar transistors; and

pairs of pixel selecting switches connected to the corresponding pairs of the transistors at their emitters.

2. An image sensor as claimed in claim 1;

wherein the operative bipolar transistors have exposed base regions which define a receiving region of incident light, and the dummy bipolar transistors have masked base regions formed linearly on a semiconductor chip, the masked base regions of the dummy bipolar transistors being disposed adjacently in parallel to the exposed base regions.

3. An image sensor as claimed in claim 1;

wherein the operative bipolar transistors have exposed base regions and the dummy bipolar transistors have covered base regions, and wherein the base regions of the dummy bipolar transistors are covered by an aluminum light-shielding film which is selectively removed from the base regions of the operative bipolar transistors.

4. An image sensor comprising:

an array of operative bipolar transistors for effecting phoyo-electric conversion of the incident light;

another array of dummy bipolar transistors optically shielded from incident light and disposed adjacently and correspondingly to the operative bipolar transistors to constitute pairs of the operative and dummy bipolar transistors;

pairs of reset switches connected to the corresponding pairs of the transistors at their base regions to concurrently reset each pair of the operative and dummy bipolar transistors;

pairs of pixel selecting switches connected to the corresponding pair of operative and dummy bipolar transistors and concurrently turned on to enable the pair of transisitors to output electric charge to common signal lines, respectively; and

pairs of pixel selecting switches successively turned on so that an image signal and an offset signal are fed to the common signal lines respectively on a time-sequential basis.

5. An image sensor as claimed in claim 4;

wherein the operative bipolar transistors have exposed base regions which define a receiving of incident light, and the dummy bipolar transistors have masked base regions formed linearly on a semiconductor chip, the masked base regions of the dummy bipolar transistors being disposed adjacently in parallel to the exposed base regions.

6. An image sensor as claimed in claim 4;

wherein the operative bipolar transistors have exposed base regions and the dummy bipolar transistors have covered base regions, and wherein the base regions of the dummy bipolar transistors are covered by an aluminum light-shielding film which is selectively removed from the base regions of the operative bipolar transistors.

7. An image sensor comprising:

an array of operative bipolar transistors for effecting photo-electric conversion of incident light;

another array of dummy bipolar transistors optically shielded from incident light and disposed adjacently and correspondingly to the operative bipolar transistors to constitute pairs of the operative and the dummy bipolar transistors;

pairs of reset switches connected to the corresponding pairs of the transistors at their base regions to concurrently reset each pair of the operative and dummy bipolar transistors; and

pairs of pixel selecting switches connected to the corresponding pairs of the transistors at their emitters and wherein the collectors of the transistors are held at a constant potential.

8. An image sensor as claimed in claim 7;

wherein the operative bipolar transistors have exposed base regions which define a receiving region of incident light, and the dummy bipolar transistors have masked base regions formed linearly on a semiconductor chip, the masked base region of the dummy bipolar transistors being disposed adjacently in parallel to the exposed base regions.

9. An image sensor as claimed in claim 7;

wherein the operative bipolar transistors have exposed base regions and the dummy bipolar transistors have covered base regions, and wherein the base regions of the dummy bipolar transistors are covered by an aluminum light-shielded film which is selectively removed from the base regions of the operative bipolar transistors.

10. An image sensor comprising:

a first array of bipolar transistors for effecting photo-electric conversion when base regions thereof are receptive of incident light;

a second array of bipolar transistors for effecting photo-electric conversion when base regions thereof are receptive of incident light, the first and second arrays being disposed adjacently to each other to define pairs of bipolar transisitors including one from the first and one from the second array;

means exposing the regions of the first base array and shielding the base region of the second array from incident light;

reset switches connected to bases of each pair of bipolar transistors to effect the concurrent reset of the bipolar transistors; and

selecting switches connected to emitters of each pair of bipolar transistors to effect the output of electric charge of selected transistors.

11. An image sensor according to claim 10, wherein the base regions of the first array are disposed linearly and the base regions of the second array are disposed parallel to the base regions of the first array and adjacent thereto.

12. An image sensor according to claim 10, wherein the means for shielding the base regions of the second array comprises an aluminum light-shielding film removed from the base regions of the first array.

13. An image sensor according to claim 10, wherein the emitters of the transistors of the first array and the emitters of the transistors of the second array are connected to common signal lines through the selecting switches.

14. An image sensor according to claim 10, wherein the collectors of all of the transistors are connected together for the application of a constant potential.