Thin-film device

• US 5,153,690 A
• Filed: 10/15/1990
• Issued: 10/06/1992
• Est. Priority Date: 10/18/1989
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Kaneko, Yoshiyuki, Tsukada, Toshihisa
• Primary Examiner(s): Prenty, Mark V.
• Application Number:
  US07/597,323
• Time in Patent Office: 722 Days
• Field of Search: 357/23.7, 357/23.14, 357/23.15, 357/51, 357/4, 357/2
• US Class Current: 257/61
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence

Abstract

A thin-film transistor using hydrogenated amorphous silicon (a-Si:H), and particularly a thin-film device such as a thin-film transistor having high conductivity, large drivability and high process margin, and a display panel using the same transistors. The object of the invention is to reduce defects due to shorts between the gate and the source or between the gate and the drain, to prevent signal line defect even in case defects develop due to shorts, and to expand the design margin and process margin in the array. A capacity is connected to the gate electrode of the channel side and a voltage is applied to the gate electrode via the capacity.

Claims

1. A thin-film device comprising a substrate, a gate electrode formed on said substrate, a gate insulator formed on said gate electrode, a channel region consisting of a semiconductor layer formed on said gate insulator, and a source electrode and a drain electrode formed on said semiconductor layer, wherein said substrate is an insulating substrate, and wherein said gate electrode has a first gate electrode and a second gate electrode which are electrically insulated from each other, said first gate electrode being provided on said second gate electrode such that a coupling capacitance can be provided between the first and second gate electrodes, and a signal is applied to the second gate electrode so as to apply the signal to the first gate electrode via the coupling capacitance, the coupling capacitance being formed at least at a location away from the channel region.

2. A thin-film device according to claim 1, wherein a capacitance is formed between an extension of said second gate electrode and an extension of said first gate electrode at a location away from the channel region of the device.

3. A thin-film device according to claim 1, wherein said channel region is composed of amorphous silicon.

4. A thin-film device according to claim 2, wherein said channel region is composed by amorphous silicon.

5. A thin-film device according to claim 1, further comprising an insulator which enables the coupling capacitance to be achieved, said insulator being positioned between the first and second gate electrodes, and wherein the insulator is in common with an insulator that insulates said two gate electrodes from each other.

6. A thin-film device according to claim 2, further comprising an insulator which enables the coupling capacitance to be achieved, said insulator being positioned between the first and second gate electrodes, and wherein the insulator is in common with an insulator that insulates said two gate electrodes from each other.

15. A thin-film device according to claim 1, further comprising an insulator which enables the coupling capacitance to be achieved, the insulator being positioned between the first and second gate electrodes.

16. A thin-film device according to claim 15, wherein the second gate electrode is made of aluminum, and the insulator is made of a aluminum oxide formed by oxidation of aluminum of the second gate electrode.

17. A thin-film device according to claim 16, wherein the gate insulator is formed of silicon nitride.

18. A thin-film device according to claim 15, wherein the insulator which enables the coupling capacitance to be achieved is smaller in thickness than the thickness of the gate insulator.

19. A thin-film device according to claim 15, wherein the coupling capacitance is greater than a capacitance of the gate insulator.

20. A thin-film device according to claim 1, wherein the source and drain electrodes do not overlap the first gate electrode but do not overlap the second gate electrode.

21. A thin-film device according to claim 20, wherein the second gate electrode is provided on the substrate and the first gate electrode is provided overlying the second gate electrode.

22. A thin-film device according to claim 1, wherein the second gate electrode is formed of aluminum and the first gate electrode is formed of doped amorphous silicon.

23. A thin-film device according to claim 22, further comprising an insulator which enables the coupling capacitance to be achieved, between the first and second gate electrodes, and wherein the insulator which enables the coupling capacitance to be achieved is formed of aluminum oxide.

7. A thin-film device comprising a substrate, a gate electrode formed on said substrate, a gate insulator formed on said gate electrode, a semiconductor layer that forms a channel region on said gate insulator, a source electrode and a drain electrode formed on said semiconductor layer, and a gate signal line that applies signals to said gate electrode, wherein said substrate is an insulating substrate, and wherein said gate electrode and said gate signal line are electrically insulated from each other, a coupling capacitance is provided between said gate electrode and said gate signal line at a location away from said channel region, and a signal is applied to the gate signal line, such that a voltage is applied to said gate electrode via said coupling capacitance.

8. A thin-film device according to claim 7, wherein said semiconductor layer is composed of amorphous silicon.

9. A thin-film device according to claim 7, wherein provision is further made of a plurality of video signal lines, said gate signal line is provided in a plural number, said plurality of video signal lines and the plural number of gate signal lines are arranged in the form of a matrix, a video signal is input to either the source electrode or the drain electrode, and a pixel electrode is electrically connected to the other one of either the source electrode or the drain electrode, thereby to constitute a display panel.

10. A thin-film device according to claim 7, wherein said coupling capacitance has an insulator composed of Al₂ O₃.

11. A thin-film device according to claim 7, wherein said coupling capacitance has an insulator composed of Ta₂ O₅.

12. A thin-film device according to claim 9, wherein said semiconductor layer is composed of amorphous silicon.

13. A thin-film device according to claim 9, wherein said coupling capacitance has an insulator composed of Ta₂ O₅.

14. A thin-film device according to claim 9, wherein said coupling capacitance has an insulator composed of Al₂ O₃.

24. A thin-film device comprising a substrate, a gate electrode formed on said substrate, a gate insulator formed on said gate electrode, a channel region consisting of a semiconductor layer formed on said gate insulator, and a source electrode and a drain electrode formed on said semiconductor layer, wherein said channel region is composed of amorphous silicon, and wherein said gate electrode has a first gate electrode and a second gate electrode which are electrically insulated from each other, said first gate electrode being provided on said second gate electrode such that a coupling capacitance can be provided between the first and second gate electrodes, and a signal is applied to the second gate electrode so as to apply the signal to the first gate electrode via the coupling capacitance, the coupling capacitance being formed at least at a location away from the channel region.

25. A thin-film device comprising a substrate, a gate electrode formed on said substrate, a gate insulator formed on said gate electrode, a semiconductor layer that forms a channel region on said gate insulator, a source electrode and a drain electrode formed on said semiconductor layer, and a gate signal line that applies signals to said gate electrode, wherein said semiconductor layer is composed of amorphous silicon, and wherein said gate electrode and said gate signal line are electrically insulated from each other, a coupling capacitance is provided between said gate electrode and said gate signal line at a location away from said channel region, and a signal is applied to the gate signal line, such that a voltage is applied to said gate electrode via said coupling capacitance.

26. A thin-film device comprising a substrate, a gate electrode formed on said substrate, a gate insulator formed on said gate electrode, a semiconductor layer that forms a channel region on said gate insulator, a source electrode and a drain electrode formed on said semiconductor layer, and a gate signal line that applies signals to said gate electrode, wherein said gate electrode and said gate signal line are electrically insulated from each other, a coupling capacitance is provided between said gate electrode and said gate signal line at a location away from said channel region, and a signal is applied to the gate signal line, such that a voltage is applied to said gate electrode via said coupling capacitance, and wherein provision is further made of a plurality of video signal lines, said gate signal line is provided in a plural number, said plurality of video signal lines and the plural number of gate signal lines are arranged in the form of a matrix, a video signal is input to either the source electrode or the drain electrode, and a pixel electrode is electrically connected to the other one of either the source electrode or the drain electrode, thereby to constitute a display panel.