Semiconductor device having a particular conductive lead structure

• US 5,157,475 A
• Filed: 01/07/1991
• Issued: 10/20/1992
• Est. Priority Date: 07/08/1988
• Status: Expired due to Term

• Current Assignee: Oki Semiconductor Company Limited (ROHM Co., Ltd.)
• Original Assignee: OKI Electric Industry Company Limited
• Inventors: Yamaguchi, Tadashi
• Primary Examiner(s): Hille, Rolf
• Assistant Examiner(s): CLARK, SHEILA V
• Application Number:
  US07/635,636
• Time in Patent Office: 652 Days
• Field of Search: 357/70, 357/80, 357/68, 357/72
• US Class Current: 257/784
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/145 Organic substrates, e.g. plastic
• CPC Class Codes: H01L 23/24 solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/49503 characterised by the die pad
• CPC Class Codes: H01L 23/49537 Plurality of lead frames mounted in one device
• CPC Class Codes: H01L 23/49548 Cross section geometry H01L23/49562 takes precedence
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01057 : Lanthanum [La]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15165 : Monolayer substrate
• CPC Class Codes: H01L 2924/1517 : Multilayer substrate
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

A thin semiconductor device comprises a die pad (52) having a first thickness, a semiconductor chip (51) mounted on the die pad (52), a plurality of conductive leads (54) each having at least a portion having a second thickness greater than the first thickness, and conductors (53) interconnecting the semiconductor chip (51) and the leads (54). The semiconductor device is sealed in a resin molding having the second thickness with portions of the leads (54) exposed. In sealing the semiconductor device in the resin molding by molding, the semiconductor device is held between the upper and lower dies of a molding die defining a cavity having a thickness equal to the second thickness to prevent the melted resin (55) from flowing and forming a thin film over the surfaces of the leads to be exposed. In modification, an extended portion having the second thickness of each lead (54) is extended toward the adjacent lead (54) and is bent, and insulating reinforcing members are held by the extended portions of the leads to prevent the separation of the leads from the resin molding and to improve the mechanical strength of the semiconductor device.

Claims

1. A semiconductor device comprising:

a semiconductor chip having a semiconductor element therein, said chip having a first thickness;

a die pad having said semiconductor chip mounted thereon, said die pad having a second thickness;

a conductive lead located adjacent to said die pad and having a first and second portion, said first portion having a third thickness greater than the sum of said first and second thicknesses;

a conductor electrically interconnecting said semiconductor element and said conductive lead; and

a sealing material sealing said semiconductor chip, die pad, conductor and conductive lead second portion, a portion of said sealing material overlying said semiconductor chip, said sealing material portion having a fourth thickness which is dependent on said third thickness of said conductive lead.

2. The device according to claim 1 wherein said third thickness is substantially equal to the sum of the first, second and fourth thicknesses.

3. The device according to claim 1 wherein said first portion of said conductive lead is effective as a barrier for said sealing material.

4. The device according to claim 1 wherein said second portion of said conductive lead which is covered by said sealing material is less thick than said first portion.

5. The device according to claim 4 wherein said sealing material and said second portion of said conductive leads have respective upper surfaces that are substantially co-planar, said semiconductor chip having an upper surface located below the upper surface of said molded insulator.

6. The device according to claim 5 wherein said conductive lead and said die pad have lower surfaces that are substantially co-planar.

7. The device according to claim 1 wherein said second portion of said conductive lead comprises a holding portion securely holding an insulating reinforcing member and wherein said holding portion has said third thickness.

8. A semiconductor device comprising:

a semiconductor chip having a semiconductor element therein, said chip having a first thickness;

a die pad having said semiconductor chip mounted thereon, said die pad having a second thickness;

a conductive lead located adjacent to said die pad and having a first portion and a second portion, the first portion having a third thickness greater than the sum of the first and second thicknesses;

a conductor electrically interconnecting the semiconductor element and said conductive lead; and

a molded insulator encapsulating said semiconductor chip, die pad, conductor and conductive lead second portion, said molded insulator having a fourth thickness overlying said semiconductor chip, said fourth thickness a function of said third thickness of said conductive lead.

9. The device according to claim 8 wherein said third thickness is substantially equal to the sum of the first, second and fourth thicknesses.

10. The device according to claim 8 wherein said first portion of said conductive lead is effective as a barrier for said insulator.

11. The device according to claim 10 wherein said second portion of said conductive lead is less thick than said first portion.

12. The device according to claim 11 wherein said molded insulator and said second portion of said conductive leads have respective upper surfaces that are substantially co-planar, said semiconductor chip having an upper surface located below the upper surface of said molded insulator.

13. The device according to claim 12 wherein said conductive lead and said die pad have lower surfaces that are substantially co-planar.

14. The device according to claim 8 wherein said first portion of said conductive lead comprises a holding portion securely holding an insulating reinforcing member and wherein said holding portion constitutes the third thickness.