Method for simulating a logic system

• US 5,157,620 A
• Filed: 03/13/1989
• Issued: 10/20/1992
• Est. Priority Date: 05/31/1988
• Status: Expired due to Term

• Current Assignee: International Computers Limited (Fujitsu Limited)
• Original Assignee: International Computers Limited (Fujitsu Limited)
• Inventors: Shaar, Zakwan
• Primary Examiner(s): Lall, Parshotam S.
• Assistant Examiner(s): Ramirez, Ellis B.
• Application Number:
  US07/322,348
• Time in Patent Office: 1,317 Days
• Field of Search: 364/200, 364/900, 364/569, 364/578, 395/500, 371/23
• US Class Current: 703/16
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking

Abstract

A logic simulator has a time loop with a number of time slots into which events are scheduled. The events are wrapped around the loop, so that event times corresponding to different cycles around the loop may be simultaneously present on the loop. This allows a small loop size to be used, which improves performance. Preferably, the loop size is a prime number. If a complete cycle of the loop is made without finding any non-empty slots a jump is made to the next event time, so as to speed up the processing. In one described embodiment, the loop size is static, while in a second described embodiment the loop size is dynamically varied to minimize the insertion of events with different event times into the same slot.

Claims

1. A method of simulating a logic system, comprising the steps:

(a) maintaining a data structure representing a cyclic time loop having a plurality of time slots, each time slot being associated with a plurality of different simulation time values corresponding to successive cycles around the time loop,

(b) inserting simulation events into the time slots, each event having an event time value, and each event being inserted into a time slot corresponding to the event time value of that event, events with different event time values corresponding to different cycles around the time loop being simultaneously present in a single time slot,

(c) maintaining a current simulation time value, and incrementing said current simulation time value to simulate passage of time, and

(d) accessing the time slot corresponding to the current simulation time value, comparing the event time values of events in that time slot with the current simulation time value, and processing only events in that time slot whose event time values are equal to the current simulation time value.

2. A method according to claim 1, wherein the step of inserting simulation events comprises inserting an event with event time value T into time slot T MOD L, where L is the number of time slots in the loop.

3. A method according to claim 1, including the further steps of detecting a cycle of the loop in which no events with event time values equal to the current simulation time value, determining the earliest event time value in the loop, and causing the current simulation time to jump to that earliest event time value.

4. A method according to claim 1, wherein the number of time slots in the loop is constant.

5. A method according to claim 4, wherein the number of time slots in the loop is less than 20.

6. A method according to claim 4, wherein the number of time slots in the loop is a prime number.

7. A method according to claim 6, wherein the number of time slots in the loop is 7.

8. A method according to claim 1, including the further step of dynamically varying the number of time slots in the loop.

9. A method according to claim 8, including the further steps of setting the number of time slots in the loop to a minimum value, and then increasing said number of time slots when an attempt is made to insert an event into a time slot that already contains an event with a different event time.

10. A method according to claim 9, wherein the number of time slots in the loop is one of a series of prime numbers.

11. A method according to claim 8, including the step of decreasing the number of time slots in the loop at the end of each simulation run.