Active matrix structure for liquid crystal display elements wherein each of the gate/data lines includes at least a molybdenum-base alloy layer containing 0.5 to 10 wt. % of chromium

• US 5,162,933 A
• Filed: 05/10/1991
• Issued: 11/10/1992
• Est. Priority Date: 05/16/1990
• Status: Expired due to Term

• Current Assignee: Hosident And Philips Display Corporation, Koninklijke Philips N.V., Nippon Telegraph and Telephone Corporation
• Original Assignee: Hosiden Corporation, Nippon Telegraph and Telephone Corporation
• Inventors: Saito, Hiroshi, Kakuda, Nobuhiko, Okamura, Masamichi, Taruta, Kiyoshi, Kato, Kinya, Ukai, Yasuhiro, Wada, Tsutomu, Aoki, Shigeo, Nakagawa, Takanobu, Sunata, Tomihisa, Kawada, Tadamichi
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): MAI, HUY KIM
• Application Number:
  US07/697,991
• Time in Patent Office: 550 Days
• Field of Search: 359/59, 359/87, 359/4, 359/23.7, 359/62
• US Class Current: 349/46
• CPC Class Codes: G02F 1/1345 Conductors connecting electrodes to cell terminals
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/13629 Multilayer wirings
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components

Abstract

In an active matrix structure for liquid crystal display elements which includes pixel electrodes arranged in a matrix form on a glass base plate, thin film transistors having their drains connected to the pixel electrodes, respectively, data lines each connected to sources of the thin film transistors of one column and gate lines connected to gates of the thin film transistors of one row, there are provided in the same plane a light blocking layer disposed opposite each of the thin film transistors across an insulating layer, a storage capacitance electrode disposed partly opposite each of the pixel electrodes across the insulating layer and storage capacitance lines for interconnecting the capacitance electrodes. The light blocking layers, the storage capacitance electrodes and the storage capacitance lines are formed of the same material and at the same time.

Claims

1. An active matrix structure for a liquid crystal display element, comprising:

a transparent base plate;

an insulating layer formed almost all over said transparent base plate;

transparent pixel electrodes arranged in matrix form on said insulating layer;

thin film transistors arranged in matrix form and having semiconductor layers formed on said insulating layer and drains connected to said transparent pixel electrodes, respectively;

a plurality of data lines connected respectively to sources of said thin film transistors in corresponding columns of the matrix;

a plurality of storage capacitance electrodes formed between said insulating layer and said transparent base plate to at least partly overlap corresponding ones of said transparent pixel electrodes via said insulating layer;

a plurality of light blocking layers formed between said transparent base plate and said insulating layer in opposing relation to the semiconductor layers of corresponding ones of said thin film transistors, for preventing the incidence of light on said semiconductor layers; and

a plurality of storage capacitance connection lines formed between said transparent base plate and said insulating layer for interconnecting said storage capacitance electrodes;

each of said storage capacitance electrodes, capacitance connecting liens and light blocking layers being formed by conductive material layers of the same structure.

2. The active matrix structure of claim 1 wherein said thin film transistors are of the staggered type and have a common gate insulating film extending over said transparent base plate to cover said semiconductor layers of said thin film transistors, said data lines, and said transparent pixel electrodes;

a plurality of gate lines formed on said common gate insulating film;

said thin film transistors having gates formed on said common gate insulating film in opposing relation to said semiconductor layers of said thin film transistors, said gates on each row of said matrix being connected to a corresponding one of said gate lines.

3. The active matrix structure of claim 1 wherein said thin film transistors are of the inversely staggered type, said insulating layer acting as a common gate insulating film of all of said thin film transistors, said light blocking layers acting as the gates of said thin film transistors, said gates on each row of said matrix being connected to a corresponding one of a plurality of gate lines formed between said transparent base plate and said insulating layer.

4. The active matrix structure of claim 1 or 2, wherein said conductive material layers each include at least an aluminum layer.

5. The active matrix structure of claim 1 or 2, wherein said conductive material layers each include at least an aluminum layer and a molybdenum-base alloy layer covering said aluminum layer, said molybdenum-base alloy layer containing 0.5 to 10 wt% of chromium.

6. The active matrix structure of claim 1 or 2, wherein said conductive material layers each include at least a molybdenum-base alloy layer, said molybdenum-base alloy layer containing 0.5 to 10 wt% of chromium.

7. The active matrix structure of claim 1 or 2, wherein each of said data lines includes at least a molybdenum-base alloy layer, said molybdenum-base alloy layer containing 0.5 to 10 wt% of chromium.

8. The active matrix structure of claim 7, wherein said each data line includes an indium-tin-oxide layer laminated on said molybdenum-base alloy layer.

9. The active matrix structure of claim 8, wherein said each data line includes an aluminum layer laminated so that said molybdenum-base alloy layer is sandwiched between said aluminum layer and said indium-tin-oxide layer.

10. The active matrix structure of claim 2 or 3, wherein said each gate line includes an aluminum layer.

11. The active matrix structure of claim 2 or 3, wherein said each gate line includes at least a molybdenum-base alloy layer, said molybdenum-base alloy layer containing 0.5 to 10 wt% of chromium.

12. The active matrix structure of claim 10, wherein said each gate line includes a molybdenum-base alloy layer laminated on said aluminum layer in a manner to cover it, said molybdenum-base alloy layer containing 0.5 to 10 wt% of chromium.

13. The active matrix structure of claim 2 wherein a plurality of data line external terminals are connected to said data lines, at least one connection wiring external terminal for said capacitance connection lines and gate line external terminals for said gate lines are formed between said insulating layer and said common gate insulating film on a marginal portion of said transparent base plate, each of said gate lines being connected at one end thereof to the corresponding one of said gate line external terminals via a first window made in said common gate insulating film to expose therethrough a portion of said corresponding gate line external terminal;

and wherein a connection wiring layer of the same material as that of said gate lines is formed on said common gate insulating film so as to connect a capacitance connection line and said connection wiring external terminal, respectively, through a second window passing through said common gate insulating film and said insulating layer to expose therethrough a portion of said capacitance connection line and a third window made in said common gate insulating film to expose therethrough a portion of said connection wiring external terminal.

14. An active matrix structure for a liquid crystal display element, comprising:

a transparent base plate;

transparent pixel electrodes arranged in a matrix form on said transparent base plate;

thin film transistors arranged in a matrix form and having their drains connected to said transparent pixel electrodes, respectively;

data lines each connected to sources of said thin film transistors of one column;

gate lines each connected to gates of said thin film transistors of one row; and

an insulating layer formed almost all over each of said transparent pixel electrodes in contact with of said transparent pixel electrodes;

each of said data lines including a molybdenum-base alloy layer containing 0.5 to 10 wt% of chromium.

15. The active matrix structure of claim 14, wherein said each data line includes an indium-tin-oxide layer laminated on said molybdenum-base alloy layer.

16. The active matrix structure of claim 15, wherein said each data line includes an aluminum layer laminated so that said molybdenum-base alloy layer is sandwiched between said aluminum layer and said indium-tin-oxide layer.

17. An active matrix structure for a liquid crystal display element, comprising:

a transparent base plate;

transparent pixel electrodes arranged in a matrix form on said transparent base plate;

thin film transistors arranged in a matrix form and having their drains connected to said transparent pixel electrodes, respectively;

a plurality of data lines connected respectively to sources of said thin film transistors of one column;

a plurality of gate lines connected respectively to gates of said thin film transistors of one row; and

an insulating layer formed almost all over each of said transparent pixel electrodes in contact with said transparent electrodes;

each of said gate lines including at least a molybdenum-based alloy layer containing 0.5 to 10 wt% of chromium.

18. The active matrix structure of claim 17, wherein said each gate line includes an aluminum layer laminated with said molybdenum-base alloy layer.

19. An active matrix structure for a liquid crystal display element, comprising:

a transparent base plate;

a plurality of transparent pixel electrodes arranged in a matrix form on said transparent base plate;

thin film transistors arranged in a matrix form and having their drains connected to said transparent pixel electrodes, respectively;

a plurality of data lines connected respectively to sources of said thin film transistors of one column;

a plurality of gate lines connected respectively to gates of said thin film transistors of one row; and

an insulating layer formed almost all over each of said transparent pixel electrodes in contact with said transparent pixel electrodes;

each of said data lines including at least a molybdenum layer having a homogeneous, densified film structure, and an aluminum layer laminated on said molybdenum layer.

20. The active matrix structure of claim 19, wherein said each data line includes an indium-tin-oxide layer laminated so that said molybdenum layer is sandwiched between said indium-tin-oxide layer and said aluminum layer.