Power management for a laptop computer with slow and sleep modes

• US 5,167,024 A
• Filed: 03/05/1992
• Issued: 11/24/1992
• Est. Priority Date: 09/08/1989
• Status: Expired due to Term

• Current Assignee: Apple Inc.
• Original Assignee: Apple Computer Incorporated (Apple Inc.)
• Inventors: Hanlon, Mike S., Bailey, Robert L., Smith, R. Steven
• Primary Examiner(s): Anderson, Lawrence E.
• Application Number:
  US07/845,781
• Time in Patent Office: 264 Days
• Field of Search: 395/375, 395/550
• US Class Current: 713/322
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3215 Monitoring of peripheral devices
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/325 Power saving in peripheral device
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: H02J 7/0063 with circuits adapted for supplying loads from the battery
• CPC Class Codes: H02J 7/00712 the cycle being controlled or terminated in response to electric parameters
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A power manager within a portable laptop computer provides power and clocking control to various units within the computer in order to conserve battery power. Transistor switches controlled by the power manager control the distribution of power and/or clock signals to the various units within the computer. The power manager includes a software routine for continually monitoring the various units and when these units are either not needed and/or not currently in use, power and/or clock signals are removed from a given unit.

Claims

1. A portable personal computer including a central processing unit (CPU), a memory unit for storing data and programs for the operation of the CPU, a user interactive device, a plurality of peripheral devices including a modem, clock signal generation means for generating a clock signal to some of the plurality of peripheral devices and the CPU, a battery for powering the CPU, the memory unit, the user interactive device, the clock signal generation means, the plurality of peripheral devices, and an apparatus for managing the use of power from the battery to the CPU, the memory unit, and the plurality of peripheral devices, wherein the apparatus for managing the use of power comprises:

(A) first switching means coupled to the CPU, the memory unit, the plurality of peripheral devices, and the battery for distributing the power from the battery to the CPU, the memory unit, and the plurality of peripheral devices, wherein the first switching means includes a plurality of first switches, each coupling the power to the CPU, the memory unit, and a respective one of the plurality of peripheral devices;

(B) second switching means coupled to the CPU, the some of the plurality of peripheral devices, and the clock signal generation means for distributing the clock signal from the clock signal generation means to the CPU and the some of the plurality of peripheral devices, wherein the second switching means includes a plurality of second switches, each coupling the clock signal to the CPU, and a respective one of the some of the plurality of peripheral devices;

(C) power managing means coupled to the CPU through a via means, to the user interactive device, to one of the plurality of peripheral devices, to the clock signal generation means, to the battery, to the first switching means, and to the second switching means for controlling the distribution of the power from the battery to the CPU, the memory unit, and the plurality of peripheral devices, and for controlling the distribution of the clock signal from the clock signal generation means to the CPU and the some of the plurality of peripheral devices, wherein the power managing means in an intelligent assistant to the CPU, wherein the power managing means further comprises

(1) timing means;

(2) memory means for storing data and programs for the operation of the power managing means;

(3) interfacing means coupled to the user interactive device and the one of the plurality of peripheral devices for interfacing the user interactive device and the one of the plurality of peripheral devices; and

(4) circuitry for running the programs stored in the memory means, wherein the power managing means communicates with the CPU via the via means, wherein the power managing means receives commands from the CPU and transfers data to and from the CPU, wherein the via means performs handshake operation to the commands and the data transferred, wherein when the CPU wants to send an output data to the user interactive device, the output data is first sent to the power managing means from the CPU, wherein when the user interactive device receives an input data for the CPU, the power managing means receives the input data from the user interactive device and stores the input data until the CPU requests the input data, wherein the power managing means operates to control the distribution of the power to the CPU, the memory unit, and the plurality of peripheral devices under the control of the commands from the CPU and inputs from the user interactive device and the one of the plurality of peripheral devices, wherein the power managing means provides for three modes of operation of the computer, an active mode for providing active operation of the computer, a sleep mode for placing the computer in an inactive state to conserve power and a slow mode in which the frequency of the clock signal is reduced in order to reduce power consumption to the some of the plurality of peripheral devices coupled to receive the clock signal, wherein the power managing means selectively controls the first switching means to provide the power to the plurality of peripheral devices and selectively controls the second switching means to provide the clock signal to the some of the plurality of peripheral devices when needed to be accessed in the active mode, wherein the power managing means controls the first switching means to remove the power from the plurality of peripheral devices in the sleep mode, wherein the power managing means reduces the frequency of the clock signal coupled to the CPU and the some of the plurality of peripheral devices via the second switching means in the slow mode; and

(D) monitoring means stored in the memory means of the power managing means for monitoring the user interactive device and the one of the plurality of peripheral devices and providing information of the user interactive device and the one of the plurality of peripheral devices to the power managing means, wherein the monitoring means is a set of program instructions running on the power managing means, wherein the monitoring means monitors the use of the user interactive device and the one of the plurality of peripheral devices at a predetermined time interval provided by the timing means, wherein when the monitoring means detects that the computer is not accessed by said user interactive device and the one of the plurality of peripheral devices for a first predetermined time period in the active mode, the power managing means controls the computer to enter the slow mode in response to a first one of the commands from the CPU, wherein when the monitoring means detects that the computer is not accessed by the user interactive device and the one of the plurality of peripheral devices for a second predetermined time period in the slow mode, the power managing means controls the computer to enter the sleep mode in response to a second one of the commands from the CPU, wherein when the monitoring means detects the inputs from the user interactive device or the one of the plurality of peripheral devices in the slow or sleep mode, the power managing means controls the computer to return to the active mode, wherein the power managing means controls the computer to enter the active mode from the sleep mode by controlling the first switching means to couple the power to the CPU, the memory, and the plurality of peripheral devices and controlling the second switching means to couple the clock signal to the CPU and the some of the plurality of peripheral devices when the monitoring means senses the inputs from the one of the plurality of peripheral devices or from the user interactive device, wherein the power managing means controls the computer to enter the active mode from the slow mode by coupling the clock signal with full frequency to the CPU and some of the pluralty of peripheral devices via the second switching means when the monitoring means senses the inputs from the user interactive device or the one of the plurality of peripheral devices within the second predetermined time period.

2. The apparatus of claim 1, wherein the power managing means comprises a microcontroller.

3. The apparatus of claim 1, wherein the power managing means further includes a wake up timer, wherein the power managing means controls the computer to enter the active mode from the sleep mode when the wake up timer is set by the power managing means to count for and reaches a third predetermined time period.

4. The apparatus of claim 1, wherein the user interactive device comprises a keyboard and a cursor control device.

5. The apparatus of claim 1, wherein the one of the plurality of peripheral devices is the modem.