Silicon carbide field-effect transistor with improved breakdown voltage and low leakage current

• US 5,170,231 A
• Filed: 05/24/1991
• Issued: 12/08/1992
• Est. Priority Date: 05/24/1990
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Suzuki, Akira, Fujii, Yoshihisa, Furukawa, Katsuki
• Primary Examiner(s): Hille, Rolf
• Assistant Examiner(s): LOKE, STEVEN HO YIN
• Application Number:
  US07/705,630
• Time in Patent Office: 564 Days
• Field of Search: 357/23.1, 357/23.2, 357/23.8, 357/61, 437/100
• US Class Current: 257/77
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7839 with Schottky drain or source contact

Abstract

A silicon carbide field-effect transistor is provided which includes a semiconductor substrate, a channel formation layer of silicon carbide formed above the substrate, source and drain regions provided in contact with the channel formation layer, a gate insulator disposed between the source and drain regions, and a gate electrode formed on the gate insulator, wherein a first contact between the channel formation layer and the drain region exhibits different electric characteristics from those of a second contact between the channel formation layer and the source region. Also provided is a method for producing such a silicon carbide field-effect transistor.

Claims

1. A silicon carbide field-effect transistor comprising a semiconductor substrate, a channel formation layer of silicon carbide formed above the substrate, source and drain regions provided in contact with the channel formation layer, a gate insulator disposed between the source and drain regions, and a gate electrode formed on the gate insulator, wherein a first contact between the channel formation layer and the drain region exhibits different electric characteristics from those of a second contact between the channel formation layer and the source region.

2. A silicon carbide field-effect transistor according to claim 1, wherein the source and drain regions are provided in the channel formation layer, and the gate insulator is formed on the channel formation layer.

3. A silicon carbide field-effect transistor according to claim 1, wherein the channel formation layer is formed on the drain region, and the source region is formed on the channel formation layer.

4. A silicon carbide field-effect transistor according to claim 1, wherein the channel formation layer is formed on the drain region, and the source region is provided in the channel formation layer.

5. A silicon carbide field-effect transistor according to claim 1, wherein the first contact is a p-n junction having excellent electric characteristics in the reverse direction thereof and the second contact is a p-n junction having excellent electric characteristics in the forward direction thereof.

6. A silicon carbide field-effect transistor according to claim 1, wherein the first contact is a p-n junction having excellent electric characteristics in the reverse direction thereof and the second contact is a Schottky junction having excellent electric characteristics in the forward direction thereof.