Subscriber terminal installation for an asynchronous network

• US 5,170,272 A
• Filed: 03/11/1991
• Issued: 12/08/1992
• Est. Priority Date: 03/12/1990
• Status: Expired due to Fees

• Current Assignee: Alcatel-Lucent France, SA (Nokia Corporation)
• Original Assignee: Alcatel-Lucent France, SA (Nokia Corporation)
• Inventors: Onno, Guy
• Primary Examiner(s): Coles, Sr., Edward L.
• Assistant Examiner(s): BACARES, RAFAEL D
• Application Number:
  US07/667,143
• Time in Patent Office: 638 Days
• Field of Search: 359/113, 359/118, 359/120, 359/121, 359/128, 359/139, 359/154, 359/167, 359/1, 370/91, 370/92, 370/94.1, 370/94.2, 370/60, 370/60.1, 370/110.1
• US Class Current: 398/58
• CPC Class Codes: H04L 2012/5614 User Network Interface
• CPC Class Codes: H04Q 11/0478 Provisions for broadband connections
• CPC Class Codes: Y10S 370/907 Synchronous optical network, SONET

Abstract

A subscriber terminal installation for an asynchronous network, the installation having a subscriber digital termination comprising a switching matrix and access modules each connected firstly to the switching matrix and secondly to an asynchronous optical interface. One of the access modules is connected to a network digital termination, while each of the other access modules is connected either to a terminal or else to a terminal adapter. A processor connected to the module processes signalling received or to be transmitted via the access modules. A terminal adapter comprises a multiplex adapter, a service adapter specific to a particular service, and a control circuit. The multiplex adapter is connected via a two-way asynchronous optical interface to an access module and via an up interface and a down interface to the service adapter, the up and down interfaces being asynchronous interfaces conveying cells.

Claims

1. A subscriber digital installation for an asynchronous network in which data is organized in cells, the installation comprising:

a first digital network terminal connected to the asynchronous network;

a second digital network terminal connected via a two-way asynchronous optical interface to the first digital network terminal;

first terminals connected directly to the second digital network terminal;

second terminals connected to said second digital network terminal via terminal adapters;

wherein the second digital network terminal comprises;

a switching matrix;

at least one processor; and

a plurality of access modules having a common structure;

each access module comprising;

a first input/output connected to the switching matrix, a second input/output connected to said processor, and a third input/output comprising a two-way asynchronous optical interface;

the third input/output of one of the access modules being connected to the first network digital termination;

the third input/output of some of the access modules being respectively connected to said first terminals; and

the third input/output of some of the access modules being respectively connected to the terminal adapters associated with said second terminals;

each of the access modules comprising;

an optical duplexer connected to an asynchronous optical interface;

an optical transmitter and an optical receiver connected to the duplexer;

a clock module connected to the output of the optical receiver;

a regenerator connected to the output of the optical receiver and to the clock module from which it receives a recovered clock signal;

a parallel-serial scrambler circuit connected to the optical transmitter via a serial transmit link, to the optical receiver via a serial receive link, and to the clock module from which it receives a local clock signal for transmitting information and a recovered clock signal for receiving information;

a cell insert and extract circuit connected to the parallel-serial scrambler circuit via a second parallel transmit link and a first parallel receive link; and

an interface circuit connected firstly to the cell insert and extract circuit via a first parallel transmit link and a second parallel receive link, and secondly to the switching matrix via a transmit link and a receive line.

2. A subscriber terminal installation according to claim 1, wherein each of the terminal adapters is constituted by a multiplex adapter connected via an asynchronous optical interface to an access module, a service adapter connected firstly to the multiplexer adapter, and secondly to a terminal, and a control circuit connected to the multiplex adapter via a control interface and to the service adapter, the multiplex adapter being the same in each terminal adapter.

3. A subscriber terminal installation according to claim 2, wherein the multiplex adapter comprises:

an optical duplexer connected to an asynchronous optical interface;

an optical transmitter and an optical receiver connected to the duplexer;

a clock module connected to the output of the optical receiver;

a regenerator connected to the output of the optical receiver and to the clock module from which it receives a recovered clock signal;

a parallel-serial scrambler circuit connected to the optical transmitter via a serial transmit link, to the optical receiver via a serial receive link, and to the clock module from which it receives a local clock signal for transmitting information and a recovered clock signal for receiving information;

a cell insert and extract circuit connected to the parallel-serial scrambler circuit via a second parallel transmit link and a first parallel receive link, and to the clock module from which it receives a local clock signal;

an interface circuit connected firstly to the cell insert and extract circuit via a first parallel transmit link and a second parallel receive link, and secondly to the service adapter;

a processor connected via a link to the interface circuit and to the cell insert and extract circuit; and

a control interface circuit connected to said link and to the control interface.

4. A subscriber terminal installation for an asynchronous network in which data is organized in cells, the installation comprising:

a first digital network terminal connected to the asynchronous network;

a second digital network terminal connected via a two-way asynchronous optical interface to the first digital network terminal;

first terminals connected directly to the second digital network terminal; and

second terminals connected to said second digital network terminal via terminal adapters;

wherein the second digital network terminal comprises;

a switching matrix;

at least one processor; and

a plurality of access modules having a common structure;

each access module comprising;

a first input/output connected to the switching matrix, a second input/output connected to said processor, and a third input/output comprising a two-way asynchronous optical interface;

the third input/output of one of the access modules being connected to the first network digital termination;

the third input/output of some of the access modules being respectively connected to said first terminals; and

the third input/output of some of the access modules being respectively connected to the terminal adapters associated with said second terminals;

each of the access modules fulfilling the following functions, under the control of said processor;

means for recovering a clock signal from data received by the third input/output;

means for generating a local clock signal defining a bit rate of data transmitted by the third input/output;

means for regenerating the levels and the time intervals of data received on the third input/output;

means for scrambling data to be transmitted by the third input/output;

means for descrambling data received by the third input/output;

means for matching the data rate of the third input/output to the data rate of the first input/output by writing and reading full cells in a queue, inserting and extracting empty cells in a flow of cells from the first to the third input/output, and in a flow of cells from the third to the first input/output;

means for enabling access modules to communicate either with one another or else with any device to which it is connected, by inserting and extracting signaling cells in said flow of cells from the first to the third input/output, and in a flow of cells from the third to the first input/output;

means for monitoring bit errors in the data received by the third input/output; and

means for enabling any device connected to the third input/output to monitor bit errors in the data transmitted by the third input/output, by sending redundant data mixed with said transmitted data.

5. A subscriber terminal installation according to claim 4, wherein each of the terminal adapters is constituted by a multiplex adapter connected via an asynchronous optical interface to an access module, a service adapter connected firstly to the multiplexer adapter, and secondly to a terminal, and a control circuit connected to the multiplex adapter via a control interface and to the service adapter, the multiplex adapter being the same in each terminal adapter.

6. A subscriber terminal installation according to claim 5, wherein the multiplex adapter comprises:

an optical duplexer connected to an asynchronous optical interface;

an optical transmitter and an optical receiver connected to the duplexer;

a clock module connected to the output of the optical receiver;

a regenerator connected to the output of the optical receiver and to the clock module from which it receives a recovered clock signal;

a parallel-serial scrambler circuit connected to the optical transmitter via a serial transmit link, to the optical receiver via a serial receive link, and to the clock module from which it receives a local clock signal for transmitting information and a recovered clock signal for receiving information;

a cell insert and extract circuit connected to the parallel-serial scrambler circuit via a second parallel transmit link and a first parallel receive link, and to the clock module from which it receives a local clock signal;

an interface circuit connected firstly to the cell insert and extract circuit via a first parallel transmit link and a second parallel receive link, and secondly to the service adapter;

a processor connected via a link to the interface circuit and to the cell insert and extract circuit; and

a control interface circuit connected to said link and to the control interface.