Direct-current power source circuit with back gate control circuit for power MOS-FET
First Claim
1. A direct current power source circuit having an input terminal, an output terminal and a ground terminal, said circuit comprising:
- a voltage control power MOS-FET as a series control device provided between said input terminal and said output terminal of the circuit, anda back gate control circuit which is connected to a back gate of said power MOS-FET and which controls a back gate voltage for causing a parasitic diode between a source and a drain of said power MOS-FET to become a non-conductive state when an input voltage applied to said input terminal becomes a low level.
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Accused Products
Abstract
A direct current power source circuit has a voltage control power MOS-FET and a back gate control circuit. The voltage control power MOS-FET is connected between an input terminal and an output terminal of the circuit and the back gate control circuit is connected to a back gate of the voltage control power MOS-FET and controls a back gate voltage for causing a parasitic diode between a source and a drain of the power MOS-FET to become a non-conductive state when an input voltage applied to the input terminal becomes a low level. The output of the back gate control circuit is also connected to a voltage dividing circuit which sets an output voltage of the power source circuit. The arrangement enables to prevent a reverse flow of current from the output terminal to the input terminal.
36 Citations
4 Claims
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1. A direct current power source circuit having an input terminal, an output terminal and a ground terminal, said circuit comprising:
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a voltage control power MOS-FET as a series control device provided between said input terminal and said output terminal of the circuit, and a back gate control circuit which is connected to a back gate of said power MOS-FET and which controls a back gate voltage for causing a parasitic diode between a source and a drain of said power MOS-FET to become a non-conductive state when an input voltage applied to said input terminal becomes a low level. - View Dependent Claims (2, 3, 4)
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Specification