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Arithmetic and logic processing unit for computer graphics system

  • US 5,185,856 A
  • Filed: 03/16/1990
  • Issued: 02/09/1993
  • Est. Priority Date: 03/16/1990
  • Status: Expired due to Term
First Claim
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1. A circuit for performing arithmetic operations on raster scan graphics data, comprising:

  • opcode means for selecting an arithmetic function;

    data source means for providing graphics data;

    bus means for bussing data from said data source means;

    a blend register for storing a blend factor;

    an alpha register for storing an alpha value;

    a data selector coupled to said blend register and said alpha register and responsive to said opcode means in selecting between said blend factor and said alpha value and outputting the selected data;

    complementing means for complementing the output of said data selector;

    multiplication means for multiplying an output of said complementing means with graphics data from said data source means in accordance with an arithmetic function selected by said opcode means to obtain transformed pixel value data;

    combining means interfaced with the multiplication means for adding transformed pixel value data to other pixel value data from said data source means; and

    processing means interfaced with the combining means for storing overflow data from the combining means when said combining means overflows.

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