Method of manufacturing a microelectronic vacuum device

• US 5,192,240 A
• Filed: 02/21/1991
• Issued: 03/09/1993
• Est. Priority Date: 02/22/1990
• Status: Expired due to Term

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Komatsu, Hiroshi
• Primary Examiner(s): Ramsey, Kenneth J.
• Application Number:
  US07/659,218
• Time in Patent Office: 747 Days
• Field of Search: 445/24, 445/50, 156/647, 156/656, 156/657, 313/309, 313/351
• US Class Current: 445/24
• CPC Class Codes: H01J 21/105 with microengineered cathode and control electrodes, e.g. Spindt-type
• CPC Class Codes: H01J 3/022 with microengineered cathode, e.g. Spindt-type

Abstract

According to an embodiment of the present invention, a planar microelectronic vacuum triode comprises a cathode with three tips for electron emission that have been sharpened to points better than 1000 Å by a microfabrication process of over-etching (excess etching) the cathod electrode layer. The cathode tips and, alternatively, an anode electrode too are elevated above the surface of a substrate such that a straight-line path exists for electrons to flow from the cathode tips to the anode. A self-aligned fabrication process is used to advantage to have the edge of a gate electrode that is nearest to the cathode and its tips complement the adjacent edge of the cathode electrode. The combination results in very low threshold voltages needed to initiate the electron flow and a high yield of anode current compared to cathode current. The addition of a shield electrode to the triode produces a tetrode device that exhibits a very high anode resistance.

Claims

1. A method of microfabrication for making a planar microelectronic field emission device, comprising the steps of:

a) depositing an insulation layer on the surface of a substrate;

b) depositing a first conductive layer on the surface of the insulation layer;

c) forming a photo-resist pattern on said first conductive layer;

d) etching the first conductive layer using an excess etching method to form a cathode electrode and an anode electrode, said cathode electrode being a serrated cathode electrode having tips;

e) etching the insulation layer using the cathode electrode and anode electrode as an etching mask such that cathode tips for electron emission are exposed by an undercutting of the cathode electrode;

f) depositing a second conductive layer using a directional particle deposition method said second conductive layer being conformally self-aligned to said cathode and anode electrodes; and

g) etching the second conductive layer to form a gate electrode, said gate electrode being spaced a first distance from said cathode electrode and spaced a second distance from said anode electrode, wherein said first distance is less than said second distance.

5. The method of claim 1 further comprising the step of coating said anode electrode with a fluorescent material.

6. The method of claim 1 further comprising the step of coating said anode electrode with copper so that bombardment by electrons from said cathode produces X-rays.

7. The method of claim 1 further comprising the step of coating said cathode electrode with a material selected from the group consisting of barium, thorium and cesium.

8. The method of claim 1 further comprising the step of providing a vacuum enclosure for said field emission device.

2. A method for the microfabrication of a planar microelectronic field emission device having an inclined gate electrode, comprising the steps of:

a) fabricating an insulation layer on the surface of a substrate;

b) forming a first photo-resist pattern on said insulator layer;

b) etching said insulation layer by an excess etching method to expose portions of said substrate and to form a plurality of insulation islands with sidewalls having a reverse taper, wherein a first group of said insulation islands have serrated edges;

c) etching said exposed substrate to form an incline surface from an edge of said insulation islands;

d) forming an electrode layer by a directional particle deposition method on the surface of said substrate and said insulation islands wherein a first portion of said electrode layer which is deposited on said substrate will be used to form a gate electrode, a second portion of said electrode layer deposited on at least one of said first group of insulator islands having serrated edges forms a cathode electrode having at least one cathode tip, and a third portion of said electrode layer deposited on at least a second insulator island forms an anode electrode;

e) forming a second photo-resist pattern on said electrode layer such that said second portion and said third portion of said electrode layer are substantially completely protected from subsequent etching, and further such that said first portion of said electrode layer is substantially completely protected from subsequent etching in a region adjacent said second portion, and exposed to subsequent etching in a region adjacent said third portion;

f) etching said electrode layer to form a gate electrode; and

g) etching the sidewalls of said insulation islands using said cathode electrode and said anode electrode as an etching mask to undercut said cathode electrode and said anode electrode in such a way as to expose the underside of at least one cathode tip.

9. The method of claim 2 further comprising the step of coating said anode electrode with a fluorescent material.

10. The method of claim 2 further comprising the step of coating said anode electrode with copper so that bombardment by electrons from said cathode produces X-rays.

11. The method of claim 2 further comprising the step of coating said cathode electrode with a material selected from the group consisting of barium, thorium and cesium.

12. The method of claim 2 further comprising the step of providing a vacuum enclosure for said field emission device.

3. A method of manufacturing electrodes with tips having a radii of curvature of under 1000 angstroms, comprising the steps of:

a) depositing an insulating layer on a substrate;

b) photomasking the insulating layer with a pattern having serrated edges;

c) etching said insulating layer longer than is necessary to cut through only the thickness of the exposed areas of the insulating layer, etching long enough such that lateral etching substantially advances from the edges of the pattern to underneath the pattern and inward from said edges;

d) continuing the etching such that the advancing lateral etching converges to form a point out of the insulating layer that has a radii of curvature of under 1000 angstroms; and

e) depositing an electrode layer with a directional particle deposition method that results in a cap of electrode material on the surface of that portion of the insulating layer that remains after step (d), the deposition such that the electrode layer has a tip with a radius of curvature of under 1000 angstroms formed on said point etched out of the insulating layer.

4. A method of manufacturing electrodes with tips having a radii of curvature of under 1000 angstroms, comprising the steps of:

a) depositing an insulating layer on a substrate;

b) depositing an electrode layer over the insulating layer;

c) photomasking the electrode layer with a pattern that contains at least one projection;

d) etching said electrode layer with a first etchant that has relatively no effect on material in the insulating layer, the etching such that those portions of the electrode layer not protected by said pattern are removed, the etching being more than is minimally necessary to cut through the thickness of the exposed areas of the electrode layer, and excessive enough that lateral etching advances from the edges of the pattern to substantially well underneath the pattern inward from said edges;

e) continuing the etching with the first etchant such that the advancing lateral etching of the electrode layer converges under said projection to form a point that has a radii of curvature of under 1000 angstroms; and

f) etching said insulating layer with a second etchant that has relatively no effect on material in the electrode layer, the etching being excessive in that lateral etching substantially advances underneath the edges of the electrode material that remains;

wherein the electrode layer has a tip with a radius of curvature of under 1000 angstroms that clears and cantilevers out beyond the remaining insulating layer.

13. The method of claim 4 wherein said substrate is a quartz substrate.

14. The method of claim 4 wherein said electrode layer is molybdenum.

15. The method of claim 4 wherein said insulating layer is silicon dioxide.

16. A method of manufacturing electrodes for field emission devices, comprising the steps of:

a) forming an insulating layer on a substrate;

b) forming an electrode layer over said insulating layer;

c) forming a photo-resist pattern with at least one projection on said electrode layer;

d) etching exposed portions of said electrode layer with a first etchant, said first etchant preferentially etching said electrode layer in comparison to said insulating layer;

e) over-etching with said first etchant such that the advancing lateral etching fronts of said electrode layer converge under said photomask projection to form a point; and

f) over-etching said insulating layer with a second etchant such that lateral etching substantially advances underneath the edges of the electrode material that remains, said second etchant preferentially etching said insulating layer in comparison to said electrode layer;

wherein the electrode layer has a tip that clears and cantilevers out beyond the remaining insulating layer.