Driver device for a duty solenoid valve

• US 5,202,813 A
• Filed: 11/21/1990
• Issued: 04/13/1993
• Est. Priority Date: 11/24/1989
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Uota, Kosaku, Mimura, Munehiko
• Primary Examiner(s): Pellinen, A. D.
• Assistant Examiner(s): ELMS, RICHARD T
• Application Number:
  US07/616,980
• Time in Patent Office: 874 Days
• Field of Search: 251/129.05, 361/152, 361/154, 361/196, 361/199, 361/205, 361/194, 361/171, 361/172, 361/144, 361/153, 323/222, 323/282, 323/283, 323/284, 323/349, 323/351, 323/288, 364/431.05, 364/431.07, 364/483, 364/510, 364/550, 364/571.01, 364/571.03, 324/114
• US Class Current: 361/154
• CPC Class Codes: G05D 16/2013 using throttling means as controlling means
• CPC Class Codes: G05D 7/0635 by action on throttling means G05D7/0688, G05D7/0694 take precedence

Abstract

A driver device for a duty solenoid valve comprises a pair of transistors 27 and 31 for controlling the excitation current level flowing through the solenoid 17 of the valve, and a transistor 45 for turning on and off the excitation current. The excitation current level is detected via an integrator 63 and A/D converter 61 by a microcomputer 62. In response to the detected excitation current level, the microcomputer 62 generates a first pulse signal (PWM signal) via OUT3 to control the level of the excitation current to a target level. Further, the microcomputer 62 outputs a second pulse signal via the OUT4 to the transistor 45 to control the duty ratio of the solenoid 17.

Claims

1. A driver device for a duty solenoid valve which controls fluid pressure by adjusting a duty ratio of an excitation of a solenoid coil, said driver device comprising:

first driver means for controlling a current level of an excitation current through said solenoid coil, in response to a duty ratio of a first pulse signal;

second driver means for turning on and off an excitation current flowing through said solenoid coil, in response to a second pulse signal having a substantially longer period than said first pulse signal;

current detector means for detecting a level of the excitation current flowing through said solenoid coil;

first pulse width modulation signal generating means for generating, in response to the level of the excitation current detected by said current detector means, said first pulse signal having a duty ratio corresponding to a target excitation current level, said first pulse width modulation signal generating means including means for storing a reference value corresponding to the duty ratio of said first pulse signal and means for comparing said reference value to a value contained in a counter means wherein said first pulse signal is output based upon said comparison; and

second pulse width modulation signal generating means for generating said second pulse signal having a duty ratio corresponding to a target fluid pressure of the duty solenoid valve;

wherein said first and second pulse width modulation signal generating means are comprised in a microcomputer.

2. A driver device as claimed in claim 1, wherein said current detector means comprises:

integrator circuit means for taking a time average of the detected excitation current level; and

an A/D converter for converting a detected analog excitation current level into a corresponding digital signal.

3. A driver device as claimed in claim 1, wherein the duty ratio of said first pulse signal is controlled to a first predetermined excitation current level during an overexcitation period, and to a second predetermined excitation current level during a hold period, within each period of said second pulse signal, said first predetermined excitation current level being higher than said second predetermined excitation current level.

4. A driver device for a duty solenoid valve which controls a fluid pressure by adjusting a duty ratio of an excitation of a solenoid coil, said driver device comprising:

first driver means for controlling a current level of an excitation current through said solenoid coil, in response to a duty ratio of a first pulse signal;

second driver means for turning on and off an excitation current flowing through said solenoid coil, in response to a second pulse signal having substantially longer period than said first pulse signal;

current detector means for detecting a level of the excitation current flowing through said solenoid coil;

first pulse width modulation signal generating means for generating, in response to the level of the excitation current detected by said current detector means, said first pulse signal having a duty ratio corresponding to a target excitation current level; and

second pulse width modulation signal generating means for generating said second pulse signal having a duty ratio corresponding to a target fluid pressure of the duty solenoid valve;

wherein said first and second pulse width modulation signal generating means are comprised in a microcomputer; and

wherein said first pulse width modulation signal generating means comprises;

a frequency division means for dividing a frequency of a clock pulse signal of said microcomputer;

a timer counter, coupled to said frequency division means, for counting a number of pulses supplied from said frequency division means, said timer counter returning to zero after each overflow;

a reference register for storing a reference value corresponding to the duty ratio of said first pulse signal;

a comparator for comparing a content of said timer counter with that of said reference register, said comparator outputting a first and a second logical level according to the content of the timer counter;

a timer control register for storing an output suppression flag bit, and bits for controlling a division factor of said frequency division means, wherein said suppression flag bit is set and cleared in response to a transition of a logical level of said second pulse signal generated by the second pulse width modulation signal generating means; and

an output control circuit means, coupled to said comparator, for outputting an output of said comparator as said first pulse signal, said output control circuit means suppressing the output of said comparator in response to said suppression flag bit stored in said timer control register.