Method of processing semiconductor wafers using a contact etch stop
First Claim
1. A method of processing a semiconductor wafer comprising the following steps:
- fabricating a wafer to define a plurality of conductively doped silicon containing active regions, the active regions having outwardly exposed surfaces positioned at varying elevations on the wafer;
depositing a layer of transition metal atop the wafer which contacts the surfaces of the active regions and other areas on the wafer;
the transition metal layer having a thickness, an outer region and an inner region;
processing the wafer under conditions which reacts a) the transition metal of the inner region over the silicon containing active regions with such silicon to produce a transition metal silicide, and b) the transition metal of the outer region to form a transition metal oxide thereby transforming the outer region over the other areas into transition metal oxide and the transition metal over the silicon containing active regions into sandwich regions of outer transition metal oxide and adjacent transition metal silicide in contact with the active regions;
the outer transition metal oxide regions of the sandwich regions having outer surfaces positioned at varying elevations on the wafer;
applying an insulating dielectric layer atop the wafer;
selectively etching the insulating dielectric layer over selected portions of different elevation sandwich regions using an etch chemistry which is highly selective to the transition metal oxide and using the transition metal oxide as an effective etch in etching of the insulating dielectric layer in a single etch step to selected outer surfaces of the sandwich regions which are at different elevations; and
etching the transition metal oxide from the selected portions of outer transition metal sandwich regions.
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Accused Products
Abstract
A method of processing a semiconductor wafer comprises: a) fabricating a wafer to define a plurality of conductively doped active regions, the active regions having outwardly exposed surfaces positioned at varying elevations of the wafer; b) providing a layer of transition metal oxide elevationally above the active regions; c) applying an insulating dielectric layer elevationally above the transition metal oxide layer; d) etching selected portions of the insulating dielectric layer over different elevation active areas using an etch chemistry which is highly selective to the transition metal oxide and using the transition metal oxide as an effective etch stop enabling etching of the insulating dielectric layer in a single etch step to adjacent selected active regions which are at different elevations; and e) etching the transition metal oxide from the selected portions and upwardly exposing selected active regions.
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Citations
36 Claims
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1. A method of processing a semiconductor wafer comprising the following steps:
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fabricating a wafer to define a plurality of conductively doped silicon containing active regions, the active regions having outwardly exposed surfaces positioned at varying elevations on the wafer; depositing a layer of transition metal atop the wafer which contacts the surfaces of the active regions and other areas on the wafer;
the transition metal layer having a thickness, an outer region and an inner region;processing the wafer under conditions which reacts a) the transition metal of the inner region over the silicon containing active regions with such silicon to produce a transition metal silicide, and b) the transition metal of the outer region to form a transition metal oxide thereby transforming the outer region over the other areas into transition metal oxide and the transition metal over the silicon containing active regions into sandwich regions of outer transition metal oxide and adjacent transition metal silicide in contact with the active regions;
the outer transition metal oxide regions of the sandwich regions having outer surfaces positioned at varying elevations on the wafer;applying an insulating dielectric layer atop the wafer; selectively etching the insulating dielectric layer over selected portions of different elevation sandwich regions using an etch chemistry which is highly selective to the transition metal oxide and using the transition metal oxide as an effective etch in etching of the insulating dielectric layer in a single etch step to selected outer surfaces of the sandwich regions which are at different elevations; and etching the transition metal oxide from the selected portions of outer transition metal sandwich regions. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of processing a semiconductor wafer comprising the following steps:
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fabricating a wafer to define a plurality of conductively doped silicon containing active regions, the active regions having outwardly exposed surfaces positioned at varying elevations on the wafer; depositing a layer of elemental titanium metal atop the wafer which contacts the surfaces of the active regions and other areas on the wafer;
the titanium layer having a thickness, an outer region and an inner region;processing the wafer under conditions which reacts a) the titanium of the inner region over the silicon containing active regions with such silicon to produce a titanium silicide comprising a formula TiSix, where "x" is from about 1.0 to 2.5, and b) the titanium of the outer region to form a titanium oxide comprising a formula TiOy, where "y" is from about 1.0 to 2.0 thereby transforming the outer region over the other areas into TiOy and the titanium over the silicon containing active regions into sandwich regions of outer TiOy and adjacent TiSix in contact with the active regions;
the outer TiOy regions of the sandwich regions having outer surfaces positioned at varying elevations on the wafer;applying an insulating dielectric layer atop the wafer; selectively etching the insulating dielectric layer over selected portions of different elevation sandwich regions using an etch chemistry which is highly selective to the TiOy and using the TiOy as an effective etch stop in etching of the insulating dielectric layer in a single etch step to selected outer surfaces of the sandwich regions which are at different elevations; and etching the TiOy from the selected portions of outer regions of the sandwich regions. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. A method of processing a semiconductor wafer comprising the following steps:
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fabricating a wafer to define a plurality of conductively doped silicon containing active regions, the active regions having outwardly exposed surfaces positioned at varying elevations on the wafer; converting the outwardly exposed surfaces of the active regions into a barrier transition metal silicide which connects with the active regions; providing a layer of transition metal oxide over the barrier transition metal silicide of the active regions thereby producing sandwich regions of outer transition metal oxide regions and adjacent transition metal silicide in contact with the active regions;
the outer transition metal oxide regions of the sandwich regions having outer surfaces positioned at varying elevations on the wafer;applying an insulating dielectric layer atop the wafer; selectively etching the insulating dielectric layer over selected portions of different elevation sandwich regions using an etch chemistry which is highly selective to the transition metal oxide and using the transition metal oxide as an effective etch stop in etching of the insulating dielectric layer in a single etch step to adjacent selected active regions which are at different elevations; and etching the transition metal oxide from the selected portions of outer transition metal sandwich regions. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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31. A method of processing a semiconductor wafer comprising the following steps:
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fabricating a wafer to define a plurality of conductively doped active regions, the active regions having outwardly exposed surfaces positioned at varying elevations on the wafer; providing a layer of transition metal oxide elevationally above the active regions; providing a barrier layer of insulating dielectric atop the wafer and over the active regions before providing the layer of transition metal oxide atop the wafer; applying an insulating dielectric layer elevationally above the transition metal oxide layer; etching selected portions of the insulating dielectric layer over different elevation active areas using an etch chemistry which is highly selective to the transition metal oxide and using the transition metal oxide as an effective etch stop enabling etching of the insulating dielectric layer in a single etch step to adjacent selected active regions which are at different elevations; and etching the transition metal oxide from the selected portions and upwardly exposing selected active regions. - View Dependent Claims (32, 33)
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34. A method of processing a semiconductor wafer comprising the following steps:
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fabricating a wafer to define a plurality of conductively doped active regions, the active regions having outwardly exposed surfaces positioned at varying elevations on the wafer; providing a layer of transition metal oxide comprising a titanium oxide comprising a formula TiOy, where "y" is from about 1.0 to 2.0 elevationally above the active regions; providing a barrier layer of insulating dielectric atop the wafer and over the active regions before providing the layer of transition metal oxide atop the wafer; applying an insulating dielectric layer elevationally above the transition metal oxide layer; etching selected portions of the insulating dielectric layer over different elevation active areas using an etch chemistry which is highly selective to the transition metal oxide and using the transition metal oxide as an effective etch stop enabling etching of the insulating dielectric layer in a single etch step to adjacent selected active regions which are at different elevations; and etching the transition metal oxide from the selected portions and upwardly exposing selected active regions. - View Dependent Claims (35, 36)
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Specification