Stationary interference cancellor
First Claim
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1. A stationary interference cancellor comprising:
- input interface circuitry means for receiving an analog audio input and for outputting a digital signal in a serial manner;
digital signal processor means of receiving said digital signal, for providing required combinations of minimum time delay and filtering to perform stationary interference cancelling, and for outputting a processed digital signal in a serial manner;
said filtering including a combination f adaptive filtering, FIR shaping filtering and automatic gain control;
memory means for receiving and storing information from said digital signal processor means and for transmitting information to said digital signal processor means; and
output interface circuitry means for receiving said processed digital signal from said digital signal processor means and for outputting an analog audio signal having its interference attenuated.
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Abstract
A stationary interference cancellor utilizes a programmable digital signal processor with cancelling software to provide the required combinations of time delay and filtering to perform interference cancelling. The digital signal processor continually analyzes the information spectrum and builds cancellation filters around stationary undesirable signals. By reducing the size of the delay and by adding an FIR shaping filter and automatic gain control at the output of the circuitry, interference cancelling performance is greatly improved.
44 Citations
11 Claims
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1. A stationary interference cancellor comprising:
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input interface circuitry means for receiving an analog audio input and for outputting a digital signal in a serial manner; digital signal processor means of receiving said digital signal, for providing required combinations of minimum time delay and filtering to perform stationary interference cancelling, and for outputting a processed digital signal in a serial manner; said filtering including a combination f adaptive filtering, FIR shaping filtering and automatic gain control; memory means for receiving and storing information from said digital signal processor means and for transmitting information to said digital signal processor means; and output interface circuitry means for receiving said processed digital signal from said digital signal processor means and for outputting an analog audio signal having its interference attenuated. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A stationary interference cancellor comprising:
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input summation means for receiving a broadband signal and a periodic interference and for transmitting a primary input and a reference input; three tap delay means for receiving said reference input and for transmitting a delayed reference input; least mean squares adaptive filter means for receiving said delayed reference input and for transmitting a filtered signal; output summation means for receiving said primary input and said filtered signal and for transmitting an output summation signal; finite impulse response digital shaping filter means for receiving said output summation signal and for transmitting a shaped filtered output; automatic gain control means for receiving said primary input and said shaped filtered output and for transmitting a control output; and
,output amplifier means for receiving said shaped filtered output and said control output and for transmitting a broadband signal having reduced or eliminated interference. - View Dependent Claims (10)
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11. A method of cancelling stationary interference comprising the steps of:
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receiving a broadband audio signal; receiving a periodic interference; digitally processing said broadband signal and said periodic interference to provide combinations of minimum time delay and filtering; outputting a broadband output audio having its interference attenuated, said digitally processing including the steps of; resetting a program; initializing a plurality of arrays to contain all zeros; resetting automatic gain control timing parameters; initializing an array holding adaptive filter coefficients to contain all zeros; determining when a real time data sample is available from A/D converter; converting said real time data ample form fixed to floating point; storing said converted real time data sample; rotating pipeline data for adaptive filter; rotating said data sample through a three tap delay line; storing output of said three tap delay line; calculating output of said adaptive filter; calculating an error signal; using said error signal to update said adaptive filter coefficients; rotating data pipeline of an FIR shaping filter; shifting said error signal into a last position in said data pipeline; setting an accumulation variable to zero; calculating an output of said FIR shaping filter; implementing an automatic gain control stage that follows said FIR shaping filter; multiplying gain from said automatic gain control by said output of said FIR shaping filter to provide a final output "sumout"; incrementing a time variable; converting said final output "sumout" from a floating point formal to a fixed point format; sending said converted final output to a D/A converter; and
,checking to determine if radio'"'"'s operational frequency has changed.
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Specification