System for computer peripheral bus for allowing hot extraction on insertion without disrupting adjacent devices

• US 5,210,855 A
• Filed: 10/07/1992
• Issued: 05/11/1993
• Est. Priority Date: 06/09/1989
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Bartol, Thomas M.
• Primary Examiner(s): Lee, Thomas C.
• Assistant Examiner(s): DONAGHUE, LARRY D
• Application Number:
  US07/957,746
• Time in Patent Office: 216 Days
• Field of Search: 395/500, 395/325, 395/800, 364/132, 364/514, 439/56, 439/59, 361/407, 361/413
• US Class Current: 710/302
• CPC Class Codes: G06F 13/4081 Live connection to bus, e.g. hot-plugging current or voltage limitation during live insertion H02H9/004
• CPC Class Codes: H05K 1/117 Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
• CPC Class Codes: H05K 2201/0746 Protection against transients, e.g. layout adapted for plugging of connector
• CPC Class Codes: H05K 2201/094 Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads

Abstract

A method and apparatus for rapid interconnection (hot plugging) peripheral device interface circuits to a computer bus is disclosed. The interconnections are completed using three sets of conductors in the sequence: common grounds, power from the bus and data lines. The time period between the interconnections is determined by the relative set back lengths of the conductors from the card edge and allows for stabilization of voltage and establishment of a stable high impedance state for the peripheral device controller circuits before the data lines are interconnected.

Claims

1. A data processing system comprising

a computer having an SCSI bus;

a plurality of peripheral device controllers coupled to the computer by the bus, each controller including control logic circuits and a voltage regulator for applying voltage to said logic circuits and having no delay, reset or degating circuits interposed between the logic circuits and the bus, said logic circuits selected from a class of devices having differing electrical characteristics but complying with the requirements of a defined specification for said class;

said bus providing both power to and data transfer with the voltage regulator and logic circuits of each controller; and

apparatus for the hot plugging of each peripheral device controller to the SCSI computer bus without disrupting data transfers on an active bus and without the use of delay, reset or degating circuits in the controller, comprising;

edge connector means attached to the bus for interconnection of the bus with a corresponding receptacle in a respective controller having parallel arrangement of plural conductors, of three different lengths, for establishing predetermined sequential electrical interconnections with the applications of a reasonable insertion force;

at least one longest length of conductor being coupled to voltage regulator and logic circuit ground terminals of the respective controller for providing a first electrical interconnection;

at least one intermediate length conductor being coupled to a power terminal of the voltage regulator of the respective controller to provide a second electrical interconnection which occurs subsequent to said first interconnection, the relative lengths of the longest length conductor and the intermediate length conductor being chosen so that, with reasonable insertion force, a sufficient time delay is provided between the first and second electrical interconnections to allow for stabilization of voltage transients induced into the bus by the first interconnection; and

the shortest length conductors being coupled to the data input/output terminals of the controller circuit to provide a third electrical interconnection which occurs subsequent to said second interconnection, the relative lengths of the intermediate length conductor and the shortest length conductors being chosen such that, with a reasonable insertion force, a sufficient time delay is provided between the second electrical interconnection and the third electrical interconnection to stabilize the voltage output of the controller voltage regulator and establish a high impedance state in the regulator prior to the third electrical connection.

2. The system of claim 1 wherein the difference in length between the longest and intermediate length conductors and the longest and shortest length conductors are in the order of 0.070 and 0.100 inch respectively to provide said time delays between said electrical interconnection upon the application of said reasonable insertion force.

3. Data processing apparatus comprising

an active computer bus and a plurality of electrical receptacles each with a first series of parallel ground, voltage and signal conductors electrically connected to the bus;

a plurality of peripheral device controller cards, each having a mating edge connector with a respective second series of ground, voltage and signal parallel conductors for connection with respective ones of the first series of parallel conductors of a respective receptacle;

each card having controller logic circuits with ground and signal terminals coupled to the second ground and signal conductors and comprised of devices selected from a class of devices having differing electrical characteristics but which comply with the requirements of a defined specification for said class, and each card including a voltage regulator with an input coupled to the second ground and voltage conductors and an output coupled to voltage terminals of the logic circuits for regulating the voltage applied to said logic circuits;

said voltage regulator and logic circuits of each card being directly connected to the parallel conductors of said card without the use of intervening delay, reset or degating circuits;

said active bus providing both power to and data transfer with said controller cards;

the ground, voltage and signal conductors of each edge connector having respectively longest, intermediate and shortest lengths for establishing sequential electrical interconnection with the ground, voltage and signal conductors of a receptacle to which the edge connector is connected without disrupting data transfers on the active bus;

the relative lengths of the ground and voltage conductors of an edge connector being chosen such that, with a reasonable insertion force applied to a card to connect it to a receptacle, a sufficient time delay is provided between the ground and voltage interconnections to allow for stabilization of voltage transients induced by the interconnection of the controller circuit ground terminals with a receptacle ground conductor;

the relative lengths of the voltage and signal conductors of an edge connector being chosen such that, with a reasonable insertion force applied to a card to connect it to a receptacle, a sufficient time delay is provided between the voltage and signal interconnections to stabilize the voltage output of the voltage regulator on the card and establish a high impedance state.

4. The apparatus of claim 3 wherein the computer bus is an SCSI bus and wherein the class of devices includes TTL open collector and tri-state devices which comply with the requirements of a defined SCSI specification.

5. The apparatus of claim 4 wherein the class of devices includes NMOS and CMOS devices which comply with the requirements of the defined SCSI specification.

6. A peripheral direct access storage device controller printed circuit card containing electronic logic circuits electrically interconnected to control said device, a voltage regulator for applying regulated voltage to the circuits, and including an apparatus for hot plugging the card into a Small Computer System Interface (SCSI) bus to provide both power and data input/output transfer without the use of delay, reset or degating circuits interposed between the logic circuits and the bus, said logic circuits selected from a class of devices having differing characteristics but complying with the requirements of a defined SCSI specification, said apparatus comprising:

a parallel arrangement of a plurality of edge conductors on said printed circuit card, electrically interconnected to said voltage regulator and electronic logic circuits,

said conductors being of three distinct set back lengths from the edge of said printed circuit card for establishing predetermined sequential electrical interconnections of said card to said bus upon the application of a reasonable insertion force to the card to interconnect the card to the bus,

a first length one of said conductors coupled to ground terminals of said voltage regulator and logic circuits for providing a first electrical interconnection with said bus,

an intermediate length one of said conductors coupled to power terminals of said voltage regulator for providing a second electrical interconnection with said bus upon stabilization of voltage transients induced into the bus by the first interconnection, and

third length ones of said conductors coupled to data lines of said logic circuits for providing a third electrical interconnection with said bus upon the stabilization of voltage in the voltage regulator and logic circuits and the establishment of a high impedance state in the voltage regulator subsequent to the second interconnection.