Real-time computer system with multitasking supervisor for building access control or the like

• US 5,210,873 A
• Filed: 05/25/1990
• Issued: 05/11/1993
• Est. Priority Date: 05/25/1990
• Status: Expired due to Fees

• Current Assignee: Schneider Electric Buildings Americas Incorporated (Schneider Electric SE)
• Original Assignee: Schneider Electric Buildings Americas Incorporated (Schneider Electric SE)
• Inventors: Gay, Kirk W., Selari, Dan
• Primary Examiner(s): Shaw, Gareth D.
• Assistant Examiner(s): KATBAB, ABDOLLAH
• Application Number:
  US07/529,227
• Time in Patent Office: 1,082 Days
• Field of Search: 395/650
• US Class Current: 718/107
• CPC Class Codes: G06F 9/445 Program loading or initiating bootstrapping G06F9/4401; security arrangements for program loading or initiating G06F21/57
• CPC Class Codes: G06F 9/4843 by program, e.g. task dispatcher, supervisor, operating system

Abstract

A method is disclosed for providing a single-tasking disk operating system with multitasking capability in a real-time computer system for building access control or the like. A number of reentrant, terminate-and-stay-resident application programs are loaded into a host microcomputer. As each application program loads, it passes its unique code segment and instruction pointer parameters to a look up table. For the last application program to be loaded, the program segment prefix of the application program residing in the disk operating system is copied and stored. When a timer interrupt prompts the program switching logic, the code segment and instruction pointer parameters of the then-executing program are compared with the values in the look-up table. If no match is found, program switching is postponed. If a match occurs indicating one of the application programs is then executing, a switch is permitted if the current program segment prefix matches the stored copy, thus providing fast switching when permissible.

Claims

1. In a computer having a processor and a system memory, a method of real-time concurrent processing in which time-sliced task switching occurs responsive to an interrupt timer of said computer among multiple independent reentrant programs and other independent nonreentrant programs all stored in said system memory, said method comprising the computer-implemented steps of:

storing a set of code segment and instruction pointer parameters for each of said reentrant programs in a look-up table of said memory;

comparing in said processor the code segment and instruction pointer parameters of said reentrant or nonreentrant program currently executing in said processor with said stored code segment and instruction pointer parameters; and

switching said processor from execution of said currently executing program to execution of a next reentrant or nonreentrant program responsive to said interrupt timer if the program segment and instruction pointer parameters of said currently executing program match with any one set of said stored code segment and instruction pointer parameters, such that said switching from execution responsive to said interrupt timer is permitted prior to completion of said program tasks only for said reentrant programs.

2. The method according to claim 1 further comprising the computer-implemented step of:

saving in said system memory the current program code segment and instruction pointer parameters of said current executing program upon switching to said next reentrant or nonreentrant program, such that when said currently executing program is again executed, execution occurs starting from the next instruction following that last executed.

3. In a computer having a processor and a memory, a method of real-time concurrent progressing in which time-sliced task switching occurs responsive to an interrupt timer of said computer among multiple independent reentrant programs and other independent nonreentrant programs all stored in said memory, each said program including a program segment prefix also stored in said memory, said method comprising the computer-implemented steps of:

storing a set of code segment and instruction pointer parameters for each of said reentrant programs in a look-up table of said memory during loading of said programs;

storing in a look-up table of said memory said program segment prefix for the last of said reentrant programs to be loaded;

comparing in said processor the code segment and instruction pointer parameters of said reentrant or nonreentrant program currently executing in said processor with said stored code segment and instruction pointer parameters;

comparing in said processor the program segment prefix currently associated with said currently executing program with said stored program segment prefix; and

switching said processor from execution of the program currently executing in said processor to execution of the next said reentrant or nonreentrant program responsive to said interrupt timer when the code segment and instruction pointer parameters of said currently executing program match with a set of said stored code segment and instruction pointer parameters and when said current program segment prefix matches said stored program segment prefix, such that said switching from execution responsive to said interrupt timer is permitted prior to completion of said program tasks only for said reentrant programs, and only when said current program segment prefix is intact.