Method for maintaining the resistance of a high resistive polysilicon layer for a semiconductor device

• US 5,212,119 A
• Filed: 11/26/1991
• Issued: 05/18/1993
• Est. Priority Date: 11/28/1990
• Status: Expired due to Term

• Current Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Cheon, Hee K., Hah, Hyung C., Baek, Yong K., Kim, Jung T.
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): EVERHART, BYRON S
• Application Number:
  US07/797,994
• Time in Patent Office: 539 Days
• Field of Search: 437/225, 437/228, 437/233, 437/235, 437/238, 437/241, 437/247, 437/248, 148/DIG. 3, 148/DIG. 118, 148/DIG. 122
• US Class Current: 438/763
• CPC Class Codes: H01L 21/02263 deposition from the gas or vapour phase
• CPC Class Codes: H01L 21/3105 After-treatment
• CPC Class Codes: H01L 21/3145 formed by deposition from a gas or vapour
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H10B 10/15 comprising a resistor load element
• CPC Class Codes: Y10S 148/003 Anneal
• CPC Class Codes: Y10S 148/118 Oxide films
• CPC Class Codes: Y10S 148/122 Polycrystalline
• CPC Class Codes: Y10S 438/958 Passivation layer

Abstract

A method for depositing a passivation layer on a semiconductor structure having a high resistance value polysilicon layer formed thereon while maintaining the high resistance value thereof and comprises sequentially depositing a silicon oxide layer and a silicon nitride layer, on a high resistance value polysilicon layer of a partially completed semiconductor structure to form a passivation layer thereover. The passivation layer including the silicon oxide layer and the silicon nitride layer is annealed with oxygen plasma in a chamber. The annealed passivation layer is then heated in the presence of a conditioning gas in the chamber to thereby maintaining the resistance of the high resistance value polysilicon layer.

Claims

1. A method for preventing the resistance of a high resistive polysilicon layer from decreasing due to the deposition of a passivation layer on the partially completed semiconductor structure which includes the high resistive polysilicon layer in a semiconductor device, the method comprising:

depositing a passivation layer including a silicon oxide layer and a silicon nitride layer on a high resistive polysilicon layer of the partially completed semiconductor structure, by utilizing a plasma-enhanced chemical vapor deposition process;

annealing the passivation layer with oxygen plasma in a chamber; and

heating the annealed passivation layer in the presence of nitrogen conditioning gas in the chamber such that it prevents the resistance of the high resistive polysilicon layer from being decreased by out-diffusing a plurality of the ions trapped into the boundary of the grains of the high resistive polysilicon during the deposition process of the passivation layer.

2. The method of claim 1 wherein the passivation layer is annealed at a temperature of 300-400 degrees Celsius for a period of 1-2 minutes in a chamber in the presence of oxygen plasma.

3. The method of claim 2 further including the simultaneously application of a radio frequency of 13.56 MHZ into the chamber and supplying 500-1,000 SCCM of oxygen and 300-500 Watts of power to the chamber to produce the oxygen plasma.

4. The method of claim 1 wherein the annealed passivation layer is heated in the presence of the nitrogen conditioning gas at a temperature of 350-450 degrees Celsius for a period of 30-60 minutes in the chamber.

5. A method for preventing the resistance of a high resistive polysilicon layer from decreasing due to the deposition of the passivation layer on the partially completed semiconductor structure including the high resistive polysilicon layer in a semiconductor device, the method comprising:

depositing a silicon oxide layer on a high resistive polysilicon layer of the partially completed semiconductor structure, by utilizing a plasma-enhanced chemical vapor deposition process;

annealing the silicon oxide layer with oxygen plasma in a chamber;

heating the annealed silicon oxide layer in the presence of nitrogen conditioning gas in the chamber;

depositing a silicon nitride layer on the resulting silicon oxide layer, by utilizing a plasma-enhanced chemical vapor deposition process;

annealing the silicon nitride layer with oxygen plasma in a chamber; and

heating the annealed silicon nitride layer in the presence of nitrogen conditioning gas in the chamber, to thereby form a passivation layer including the silicon oxide layer and silicon nitride layer, such that it prevents the resistance of the high resistive polysilicon layer from being decreased by out-diffusing a plurality of the ions trapped into the boundary of the grains of the high resistive polysilicon during the deposition process of the passivation layer.

6. The method of claim 5 wherein the passivation layer is annealed at a temperature of 300-400 degrees Celsius for a period of 1-2 minutes in a chamber in the presence of oxygen plasma.

7. The method of claim 6 further including the simultaneous application of a radio frequency of 13.56 MHZ into the chamber and supplying 500-1,000 SCCM of oxygen and 300-500 Watts of power to the chamber to produce the oxygen plasma.

8. The method of claim 5 wherein the annealed passivation layer is heated in the presence of the nitrogen conditioning gas at a temperature of 350-450 degrees Celsius for a period of 30-60 minutes in the chamber.

9. A method for depositing a passivation layer on a semiconductor structure having a high resistance value polysilicon layer formed thereon while maintaining the high resistance value thereof, the method comprising:

sequentially depositing a silicon oxide layer and a silicon nitride layer, on the high resistance value polysilicon layer of a partially completed semiconductor structure to form a passivation layer thereon;

annealing the passivation layer including the silicon oxide layer and the silicon nitride layer with oxygen plasma in a chamber; and

heating the annealed passivation layer in the presence of a conditioning gas in the chamber thereby maintaining the resistance of the high resistance value polysilicon layer.

10. The method of claim 9 wherein the silicon oxide layer and the silicon nitride layer are deposited utilizing a plasma-enhanced chemical vapor deposition process.

11. The method of claim 9 wherein the passivation layer is annealed at a temperature of 300-400 degrees Celsius for a period of 1-2 minutes in a chamber in the presence of oxygen plasma.

12. The method of claim 11 further including applying 13.56 MHZ radio frequency into the chamber and supplying 500-1,000 SCCM of oxygen and 300-500 Watts of power to the chamber to produce oxygen plasma.

13. The method of claim 9 wherein the annealed passivation layer is heated in the presence of a nitrogen conditioning gas at a temperature of 350-450 degrees Celsius for a period of 30-60 minutes in the chamber.

14. A method for depositing a passivation layer on a semiconductor structure having a high resistance value polysilicon layer formed thereon while maintaining the high resistance value thereof, the method comprising:

depositing a silicon oxide layer and a silicon nitride layer, on the high resistance polysilicon layer by a plasma-enhanced chemical vapor deposition process to form a passivation layer on the semiconductor structure;

annealing the passivation layer including the silicon oxide layer and the silicon nitride layer at a temperature of 300-400 degrees Celsius for a period of 1-2 minutes in a chamber in the and simultaneously applying 13.56 MHZ radio frequency into the chamber and supplying 500-1,000 SCCM of oxygen and 300-500 Watts of power to the chamber to produce oxygen plasma; and

heating the annealed passivation layer in the presence of a nitrogen conditioning gas at a temperature of 350-450 degrees Celsius for a period of 30-60 minutes in the chamber thereby maintaining the resistance of the high resistant polysilicon layer.

15. A method for depositing a passivation layer on a semiconductor structure having a high resistance value polysilicon layer formed thereon while maintaining the high resistance value thereof, the method comprising:

depositing a silicon oxide layer on the high resistant polysilicon layer;

annealing the silicon oxide layer with oxygen plasma;

heat treating the annealed silicon oxide layer with nitrogen conditioning gas in a chamber;

depositing a silicon nitride layer on the annealed silicon oxide layer;

annealing the silicon nitride layer by treatment with oxygen plasma; and

heat treating the annealed silicon nitride layer with nitrogen conditioning gas in the chamber to form a resulting passivation layer thereby maintaining the high resistance of the high resistant polysilicon layer.

16. The method of claim 15 wherein the silicon oxide layer and the silicon nitride layer are each deposited utilizing a plasma-enhanced chemical vapor deposition process.

17. The method of claim 15 wherein the silicon oxide layer and the silicon nitride layer are annealed at a temperature of 300-400 degrees Celsius for a period of 1-2 minutes in a chamber in the presence of oxygen plasma.

18. The method of claim 17 wherein the oxygen plasma is formed in the chamber and simultaneously applying 13.56 MHZ radio frequency into the chamber and supplying 500-1,000 SCCM of oxygen and 300-500 Watts of power to the chamber to produce oxygen plasma.

19. The method of claim 15 wherein the annealed silicon oxide layer and the annealed silicon nitride layer are each heated in the presence of a nitrogen conditioning gas at a temperature of 350-450 degrees Celsius for a period of 30-60 minutes in the chamber.

20. A method for depositing a passivation layer on a semiconductor structure having a high resistance value polysilicon layer formed thereon while maintaining the high resistance value thereof, the method comprising:

depositing a silicon oxide layer on the high resistant polysilicon layer to a predetermined thickness by a plasma-enhanced chemical vapor deposition process;

annealing the silicon oxide layer at a temperature of 300-400 degrees Celsius for a period of 1-2 minutes in a chamber in the and simultaneously applying 13.56 MHZ radio frequency into the chamber and supplying 500-1,000 SCCM of oxygen and 300-500 Watts of power to the chamber to produce oxygen plasma;

heating the annealed silicon oxide layer in the presence of a nitrogen conditioning gas at a temperature of 350-450 degrees Celsius for a period of 30-60 minutes in the chamber;

depositing a silicon nitride layer on the annealed silicon oxide layer by a plasma-enhanced chemical vapor deposition process;

annealing the silicon nitride layer at a temperature of 300-400 degrees Celsius for a period of 1-2 minutes in the chamber in the and simultaneously applying 13.56 MHZ radio frequency into the chamber and supplying 500-1,000 SCCM of oxygen and 300-500 Watts of power to the chamber to produce oxygen plasma thereby forming a resulting passivation layer; and

heating the annealed silicon nitride layer in the presence of a nitrogen conditioning gas at a temperature of 350-450 degrees Celsius for a period of 30-60 minutes in the chamber thereby maintaining the high resistance of the high resistant polysilicon layer.