Method for optimizing computer code to provide more efficient execution on computers having cache memories

• US 5,212,794 A
• Filed: 06/01/1990
• Issued: 05/18/1993
• Est. Priority Date: 06/01/1990
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Company (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Hansen, Robert C., Pettis, Karl W.
• Primary Examiner(s): Clark, David L.
• Assistant Examiner(s): FAGAN, MATTHEW
• Application Number:
  US07/531,782
• Time in Patent Office: 1,082 Days
• Field of Search: 364/DIG. 1, 364/DIG. 2, 395/700, 371/19
• US Class Current: 717/153
• CPC Class Codes: G06F 11/3409 for performance assessment
• CPC Class Codes: G06F 11/3466 Performance evaluation by tracing or monitoring
• CPC Class Codes: G06F 8/4442 Reducing the number of cache misses; Data prefetching cache prefetching G06F12/0862

Abstract

The method uses statistical information obtained by running the computer code with test data to determine a new ordering for the code blocks. The new order places code blocks that are often executed after one another close to one another in the computer'"'"'s memory. The method first generates chains of basic blocks, and then merges the chains. Finally, basic blocks that were not executed by the test data that was used to generate the statistical information are moved to a distant location to allow the blocks that were used to be more closely grouped together.

Claims

1. A method for operating a digital computer, including a memory for the storage of computer instructions and data, to convert a first computer program to a second computer program, said first computer program comprising a set of basic blocks of computer code arranged in a first linear order and said second computer program comprising a second set of basic blocks in a second linear order, each basic block of said second set of basic blocks being derived from one of said basic blocks of said first set of basic blocks, said method comprising the steps of:

(a) determining the frequency with which each basic block of said first set of basic blocks transfers control to each other basic block of said first set of basic blocks when said first computer program is executed with test data;

(b) providing an indicator for each pair of said basic blocks of said first set of basic blocks having a determined transfer frequency greater than zero, each said indicator having a first state and a second state, each said indicator being initialized to said first state;

(c) determining which pair of basic blocks of said first set of basic blocks for which said indicator corresponding to said pair is in said first state has the largest transfer frequency and setting said indicator corresponding to said pair to said second state;

(d) combining a pair of chains of said first set of basic blocks to form a new chain which replaces said pair of chains if a source basic block for said pair of chains is the tail of one of said chains and a target basic block is the head of the other of said chains, said source basic block and target basic block being said pair of basic blocks determined in step (c);

(e) repeating steps (c) and (d) until all said indicators are in said second state; and

(f) arranging said chains in a linear order to generate said second computer program.

2. The method of claim 1 wherein said step of arranging said chains in a linear order further comprises the step of placing a first one of said chains in front of a second one of said chains if said first chain contains the source of a conditional branch and said second chain contains the target of said conditional branch.

3. The method of claim 2 wherein said digital computer further comprises means for loading said second computer program into said computer memory at memory locations specified by labels in said second computer program and wherein said step of arranging said chains further comprises the step of placing the target basic block of each pair of chains combined in step (d) having a determined transfer frequency less than a predetermined value into a code segment separate from that containing the source basic block of said each pair of chains combined in step (d), and labeling said separate code segment in a manner that will cause said separate code segment to be placed in a specified area of computer memory when said second computer program is loaded into said digital computer prior to execution of said second computer program.

4. The method of claim 3 further comprising the step of converting a branch instruction ending said source basic block of one of said chains to a long branch instruction.

5. In a digital computer system including a computer memory, a method for causing said digital computer system to load a computer program comprising a plurality of procedures, wherein at least some of said procedures when executed by said computer system call others of said procedures, into said computer memory, said method comprising the steps of:

(a) determining the frequency with which each procedure calls each other procedure in said computer program; and

(b) placing said procedures in said computer'"'"'s memory in an order that depends on said determined frequencies,

wherein said step of placing said procedures comprises the steps of;

(c) defining groups of said procedures, each group initially comprising one of said procedures, each group being defined as being determined or incompletely determined, said groups being initially defined to be incompletely determined;

(d) defining a weight for each pair of said groups, said weight initially being the determined frequency with which said procedure in one group of said each pair called said procedure in the other group of said each pair;

(e) combining a pair of said groups having the highest weight to form a new group which replaces each group in said pair of groups;

(f) determining an order for the procedures in said new group if one of the groups in said combined pair was defined as being incompletely determined, said new group being defined as being determined if an order is determined for all procedures in said new group, and being defined as incompletely determined otherwise;

(g) defining weight for each pair of groups containing said new group, is said weight being the sum of the frequencies with which said new group called the other group in said each pair of groups; and

(h) repeating steps (e) through (g) until only one group remains, the order in which said procedures are loaded into said computer memory being determined by the order of said procedures in said remaining group.

6. The method of claim 5 wherein said step of determining an order for the procedures in a group which resulted from the combination of two groups in which one of said groups was defined as being incompletely determined and in which said combined groups includes at least three said procedures, said step of determining an order comprises the steps of:

constructing a list of all possible orderings of procedures in said new group group;

eliminating orderings in which a pair of procedures in which neither procedure calls the other are placed next to each other; and

choosing one of said remaining orderings as the order for the procedures in said new group.