Method for forming a grown bipolar electrode contact using a sidewall seed

• US 5,213,989 A
• Filed: 06/24/1992
• Issued: 05/25/1993
• Est. Priority Date: 06/24/1992
• Status: Expired due to Fees

• Current Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Mazure, Carlos A., Hayden, James D., Fitch, Jon T.
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): NGUYEN, TUAN H
• Application Number:
  US07/903,300
• Time in Patent Office: 335 Days
• Field of Search: 437/31, 437/89, 437/90, 437/162, 437/203, 437/31, 148/DIG. 11
• US Class Current: 438/365
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 29/66272 Silicon vertical transistors H01L29/66242, H01L29/66257 and H01L29/66265 take precedence
• CPC Class Codes: Y10S 148/011 Bipolar transistors

Abstract

A method for forming a grown bipolar transistor electrode contact wherein a substrate (12) is provided. A doped region (31) is formed within the substrate (12). A dielectric layer (26) is formed having an opening (36) which exposes a portion of the doped region (31). Conductive spacers (38) are formed adjacent a sidewall of the dielectric layer (26). A conductive region (34) is formed through either a selective process or an epitaxial process by using the conductive spacers (38) as a source for epitaxial or selective formation. The conductive region (34) forms the grown bipolar electrode contact by electrically contacting the doped region (31). The conductive region (34) is optionally overgrown in a lateral direction over a top surface of the dielectric layer (26) to form a self-aligned electrical contact pad for the doped region (31).

Claims

1. A method for forming an electrical contact to a bipolar transistor electrode comprising the steps of:

providing a substrate;

forming a layer of material having a top surface and overlying the substrate;

forming a contact opening in the layer of material wherein the contact opening exposes a portion of the substrate and has a sidewall, said contact opening having a first radius;

forming a conductive region within the substrate, the conductive region functioning as a portion of said bipolar transistor electrode;

forming a sidewall selective source material adjacent the sidewall of the contact opening, the sidewall selective source material reducing the contact opening from the first radius to a second radius wherein the second radius is smaller than the first radius; and

forming a conductive contact region within the contact opening by growing the conductive contact region using the sidewall selective source material as a growth source, the conductive contact region forming said electrical contact to the bipolar transistor electrode in a reduced growth time due to reduction in radius of the contact opening.

2. The method of claim 1 wherein the step of forming the conductive contact region comprises:

laterally overgrowing the conductive contact region over a portion of the top surface of the layer of material to form a self-aligned contact region for the bipolar transistor electrode.

3. The method of claim 1 wherein the step of forming the conductive region within the substrate comprises:

forming the conductive region as a portion of the bipolar transistor electrode wherein the bipolar transistor electrode is an electrode selected from a group consisting of;

an emitter electrode, a collector electrode, and a base electrode.

4. The method of claim 1 wherein the step of forming the conductive region within the substrate comprises:

forming the conductive region self-aligned to the contact opening by doping a portion of the substrate which is exposed by the contact opening.

5. The method of claim 1 wherein the step of forming the conductive contact region comprises:

forming the conductive contact region by using both the sidewall selective source material and an exposed portion of the substrate which is exposed by said contact opening as growth sources.

6. The method of claim 1 wherein the step of forming the sidewall selective source material comprises:

forming the sidewall selective source material from a material which comprises silicon.

7. The method of claim 1 further comprising a step of:

forming a dielectric region between said sidewall selective source material and said sidewall of the contact opening.

8. The method of claim 1 wherein the step of forming the sidewall selective source material comprises:

forming the sidewall selective source material as a sidewall spacer.

9. A method for forming an electrical contact to a bipolar transistor electrode comprising the steps of:

providing a silicon substrate;

forming a layer of material having a top surface and overlying the silicon substrate;

etching an opening in the layer of material wherein the opening has a volume, exposes a portion of the silicon substrate to form an exposed silicon substrate portion, defines placement of the electrical contact, and has a sidewall;

forming a conductive region within the exposed silicon substrate portion, the conductive region functioning as said bipolar transistor electrode;

forming an etch stop layer within the opening;

depositing a layer of conductive material which comprises silicon;

etching the layer of conductive material selective to the etch stop layer to form a conductive sidewall spacer which is adjacent the sidewall of the opening and which reduces said volume of the opening, the conductive sidewall spacer comprising silicon; and

growing a conductive contact region, which comprises

silicon, within the opening by using the conductive sidewall spacer as a source for growth, the conductive contact region forming said electrical contact to the bipolar transistor electrode.

10. The method of claim 9 wherein the step of growing the conductive contact region comprises:

laterally overgrowing the conductive contact region over a portion of the top surface of the layer of material to form a self-aligned contact region for the bipolar transistor electrode.

11. The method of claim 9 wherein the step of forming a conductive region within the silicon substrate comprises:

forming the conductive region as a portion of the bipolar transistor electrode wherein the bipolar transistor electrode is an electrode selected from a group consisting of;

an emitter electrode, a collector electrode, and a base electrode.

12. The method of claim 9 wherein the step of forming the conductive region within the silicon substrate comprises:

forming the conductive region self-aligned to the opening by doping a portion of the exposed silicon substrate portion to form a diffusion region.

13. The method of claim 9 further comprising a step of:

forming said etch stop layer as a dielectric region between said conductive sidewall spacer and said sidewall of the opening.

14. A method for forming a self-aligned electrical contact region to a bipolar transistor electrode comprising the steps of:

providing a silicon substrate;

forming a dielectric layer of material overlying the silicon substrate, the dielectric layer of material having a top surface;

forming a contact opening in the dielectric layer of material wherein the contact opening exposes a portion of the silicon substrate to form an exposed portion of the silicon substrate and has a sidewall;

forming a conductive doped region within the silicon substrate, the conductive doped region functioning as at least a portion of said bipolar transistor electrode;

forming a sidewall spacer adjacent the sidewall of the contact opening, for the purpose of reducing the contact opening from a first radius to a smaller second radius to reduce contact opening volume;

growing a conductive epitaxial region to fill a portion of the contact opening by using the sidewall spacer and a portion of the exposed portion of the silicon substrate as a source for growth, the conductive epitaxial region forming said electrical contact to at least a portion of said bipolar transistor electrode; and

overgrowing the conductive epitaxial region laterally over the top surface of the dielectric layer of material to form said self-aligned electrical contact region for the bipolar transistor electrode, the self-aligned electrical contact region at least partially overlying the conductive doped region.

15. The method of claim 14 wherein the step of forming the conductive doped region within the silicon substrate comprises:

forming the conductive doped region as a portion of the bipolar transistor electrode wherein the bipolar transistor electrode is an electrode selected from a group consisting of;

an emitter electrode, a collector electrode, and a base electrode.

16. The method of claim 14 wherein the step of forming the conductive doped region within the silicon substrate comprises:

forming the conductive doped region self-aligned to the contact opening by doping a portion of the silicon substrate which is exposed by the contact opening.

17. The method of claim 14 wherein the step of forming the conductive epitaxial region comprises:

doping the conductive epitaxial region by using one of either in-situ doping or ion implantation.

18. The method of claim 14 wherein the step of forming the sidewall spacer comprises:

forming the sidewall spacer from a material that comprises silicon.

19. The method of claim 14 further comprising a step of:

forming a dielectric region between said sidewall spacer and said sidewall of the contact opening.

20. The method of claim 14 further comprising a step of:

forming a portion of the bipolar transistor electrode by thermally driving dopant atoms from the conductive epitaxial region into the silicon substrate.