Programmable neural logic device
First Claim
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1. A programmable logic cell comprising:
- data input means having a plurality of data inputs;
logic means, connected to said data inputs, for performing logical operations on signals on said inputs, said logic means having a plurality of data input enabling means having logic setting signals as input thereto and a plurality of data input inverting means for enabling and inverting said signals on said inputs, respectively, said logic means also having a means for selecting a logic operation from a plurality of operations performed on said signals from said inverting and enabling means;
setting means for initially setting said logic means, said setting means being connected to said logic means so that said logic setting signals can be used to set a logic operation to be performed by said logic means;
logic operation changing means connected to said logic means for changing a logic operation to be performed by said logic means during operation of said cell; and
data output means connected to said logic means for reading a result of a logic operation of said logic means.
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Abstract
A programmable logic cell, compatible with LSSD (Level Sensitive Scan Design) technique, is described whose internal logic function can be initially loaded from an EPROM or external processor. The output or contents of one cell can be connected to another cell to alter the logic operation of the second cell even while this second cell is in operation. The cells can be connected together to form a neural network.
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12 Claims
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1. A programmable logic cell comprising:
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data input means having a plurality of data inputs; logic means, connected to said data inputs, for performing logical operations on signals on said inputs, said logic means having a plurality of data input enabling means having logic setting signals as input thereto and a plurality of data input inverting means for enabling and inverting said signals on said inputs, respectively, said logic means also having a means for selecting a logic operation from a plurality of operations performed on said signals from said inverting and enabling means; setting means for initially setting said logic means, said setting means being connected to said logic means so that said logic setting signals can be used to set a logic operation to be performed by said logic means; logic operation changing means connected to said logic means for changing a logic operation to be performed by said logic means during operation of said cell; and data output means connected to said logic means for reading a result of a logic operation of said logic means. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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Specification