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Monopulse reply extractor for SSR navigation systems

  • US 5,220,329 A
  • Filed: 07/30/1991
  • Issued: 06/15/1993
  • Est. Priority Date: 07/30/1991
  • Status: Expired due to Term
First Claim
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1. An SSR processor/decoder for separating pulse code replies in a series of replies comprising:

  • a leading edge detector for receiving said series of replies and generating pulses representing the leading edge of each pulse in said replies;

    a delay line connected to receive said pulses representing said leading edge, said delay line having a plurality of taps corresponding to pulses having a known time position within a reply, first and second of said taps corresponding to first and second framing pulses representing the first and last pulses in a reply, a third tap representing a time position following said first framing pulse between a pair of consecutive pulses, and fourth and fifth taps which represent time positions subsequent to said first framing pulse, and which differ by the time interval between framing pulses;

    a bracket decoder connected to said first and second taps for determining the beginning and end of a reply;

    a phantom reply detector connected to said third, fourth and fifth taps for inhibiting said bracket decoder when two replies are represented by pulses in said delay line, one of said replies having a pulse spaced from a pulse of said other reply equal to the spacing of said framing pulses; and

    code pulses position decoder means for receiving said pulses from said delay line, and a signal from said bracket decoder, said code pulse position decoder providing data representing a single reply.

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