Methods and means for reducing bit error rates in reading self-clocking glyph codes
First Claim
1. A method for reducing bit errors in reading self-clocking glyph codes that encode n-bit long multi-bit digital values in a set of 2n graphically discriminable glyphs, said method comprising the steps ofidentifying a cyclical serial ordering of said glyphs wherein each glyph is an adjacent neighbor of the glyphs with which it is most likely to be confused during said reading, andassigning successive n-bit long Gray code values to said glyphs in accordance with said ordering, whereby the value encoded by each of said glyphs differs from the values encoded by the glyphs with which it is most likely to be confused by just one bit position.
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Abstract
The glyphs of a self-clocking glyph code for encoding n-bit long multi-bit digital values are preordered in a cyclical sequence, based on their analytically or empirically determined probabilities of being confused with each other, such that each glyph is adjacent in that sequence to the two glyphs with which it is more likely to be confused during decoding. Binary encoding values then are assigned to these ordered glyphs in accordance with an n-bit long Gray code sequence, so that the value assigned to any given glyph differs in just one bit position from the values assigned to the glyphs with which it is most likely to be confused.
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Citations
6 Claims
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1. A method for reducing bit errors in reading self-clocking glyph codes that encode n-bit long multi-bit digital values in a set of 2n graphically discriminable glyphs, said method comprising the steps of
identifying a cyclical serial ordering of said glyphs wherein each glyph is an adjacent neighbor of the glyphs with which it is most likely to be confused during said reading, and assigning successive n-bit long Gray code values to said glyphs in accordance with said ordering, whereby the value encoded by each of said glyphs differs from the values encoded by the glyphs with which it is most likely to be confused by just one bit position.
Specification