Load driver circuit

• US 5,222,011 A
• Filed: 11/04/1991
• Issued: 06/22/1993
• Est. Priority Date: 11/04/1991
• Status: Expired due to Term

• Current Assignee: Temic Automotive of North America, Incorporated (Continental AG)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Braun, Jeffrey J.
• Primary Examiner(s): Gaffin, Jeffrey A.
• Application Number:
  US07/787,443
• Time in Patent Office: 596 Days
• Field of Search: 361/139, 361/152, 361/154, 361/160, 361/170, 361/187, 361/195
• US Class Current: 361/154
• CPC Class Codes: H01H 47/325 by switching regulator

Abstract

Load driver circuit (10) has first and second comparators (Cphd 1, C₂) which receive a load current signal (V_s) indicative of current flowing through a load (11). The comparators provide, as output signals, set on and set off signals (at 21, 23) in response to comparing the load current signal (V_s) with first and second thresholds (T₁, T₂). Driver circuitry (27, 43, 12) receives the set on and set off signals and provides a current control signal (at 18) for controlling load current. Preferably, disabling circuitry (30-34) disables the comparators (C₁, C₂) after and in response to the comparators providing their respective output signals (at 21, 23). Also, preferably enabling circuitry (40-42) enables the comparators (C₁, C₂) in response to comparing a sensed voltage (at 17), indicative of voltage at an output terminal of a switching device (12) that controls load current, with respect to a predetermined voltage (2.5 volts). The selective enabling/disabling of the Comparators (C₁ , C₂) results in minimizing the possible effect of noise with respect to controlling load current since undesired false or repetitive outputs of the comparators are minimized.

Claims

1. Load driver circuit comprising:

first comparator means for receiving a load current signal indicative of current flowing through a load and for providing as an output signal a set on signal in response to said load current signal being less than a first threshold;

second comparator means for receiving said load current signal and providing as an output rignal a set off signal in response to said load current exceeding a second threshold more than said first threshold;

driver means coupled to said first and second comparator means for receiving said set on signal and said set off signal and providing a load current control signal for controlling current flow through said load in response thereto;

wherein the improvement comprises means for disabling at least one of said first and second comparator means in response to and after said one of said first and second comparator means provides its output signal, whereby the generation of undesired set on/set off signals due to noise signals is minimized.

2. A load driver circuit according to claim 1 wherein said disabling means includes means for disabling each of said first and second comparator means in response to and after said each of said first and second comparator means provides its output signal, respectively.

3. A load driver circuit according to claim 2 wherein said disabling means includes feedback means, which includes delay circuit means,for providing a time delay between the providing of said set on and set off signals and the resultant disabling of said first and second comparators means in response to said set on and set off signals.

4. A load driver circuit according to claim 3 wherein said time delay provided by said delay circuit means has a magnitude of at least five nanoseconds.

5. A load driver circuit according to claim 3 wherein said driver means comprises a latch means which receives said set on and set off signals and provides in response thereto an output signal at an output of said latch means for determining said load current control signal.

6. A load driver circuit according to claim 5 wherein said latch means output signal is alternately set to high and low logic states by said set on and set off signals.

7. A load driver circuit according to claim 6 wherein said driver means includes logic gate means for receiving said output signal of said latch means and a command signal as inputs and providing said current control signal as an output.

8. A load driver circuit according to claim 5 wherein said feedback means is coupled between said latch means output and said first and second comparator means.

9. A load driver circuit according to claim 2 wherein said disabling means maintains each one of said first and second comparator means disabled until at least the next time occurrence of another of said first and second comparator means providing its output signal.

10. A load driver circuit according to claim 1 wherein said disabling means maintains said one of said first and second comparator means disabled until at least the next time occurrence of another one of said first and second comparator means providing its output signal.

11. A load driver circuit according to claim 1 which includes enabling means for enabling said one of said first and second comparator means after said one of said first and second comparator means has been disabled by said disabling means.

12. Load driver circuit comprising:

first comparator means for receiving a load current signal indicative of current flowing through a load and for providing as an output signal a set on signal in response to said load current signal being less than a first threshold;

second comparator means for receiving said load current signal and providing as an output signal a set off signal in response to said load current exceeding a second threshold more than said first threshold;

driver means coupled to said first and second comparator means for receiving said set on signal and said set off signal and providing a load current control signal for controlling current flow through said load in response thereto, said driver means including an output switching device having a control terminal, which control terminal receives said control signal, and said output switching device having a pair of output terminals, at least one of said output terminals to be coupled to said load;

wherein the improvement comprises means for enabling at least one of said first and second comparator means in response to comparing a sensed voltage, indicative of the voltage at said one output terminal of said device, with respect to a predetermined voltage.

13. A load driver circuit according to claim 12 wherein said enabling means includes means for enabling one of said first and second comparator means in response to said sensed voltage exceeding said predetermined voltage and otherwise enabling a different one of said first and second comparator means.

14. A load driver circuit according to claim 12 wherein said enabling means comprises a third comparator means having one input coupled to said one output terminal of said device.

15. A load driver circuit according to claim 12 wherein said enabling means alternately and repetitively enables one of said first and second comparator means and then another one of said first and second comparator means in response to variations of said sensed voltage provided in response to said set off and set on signals.

16. A load driver circuit according to claim 12 which includes means for disabling at least one of said first and second comparator means in response to and after said one of said first and second comparator means provides its output signal, and wherein said disabling means maintains said one of said first and second comparator means disabled until at least the next time occurrence of another one of said first and second comparator means providing its output signal.

17. A load driver circuit according to claim 16 wherein said disabling means also includes means for disabling said another one of said first and second comparator means in response to and after said another one of said first and second comparator means provides its output signal and wherein said disabling means maintains said another one of said first and second comparator means disabled until at least the next time occurrence of said one of said first and second comparator means providing its output signal.

18. Load driver circuit comprising:

a load having a varying load current therein;

an output switching device having a control input terminal and a pair of output terminals, at least one of said output terminals coupled to said load and said control input terminal receiving a current control signal for controlling said load current in said load;

first comparator means for receiving a load current signal indicative of said load current flowing through said load and for providing as an output signal a set on signal in response to said load current signal being less than a first threshold;

second comparator means for receiving said load current signal and providing as an output signal a set off signal in response to said load current exceeding a second threshold more than said first threshold;

driver means, which includes said output switching device, coupled to said first and second comparator means for receiving said set on signal and said set off signal and providing said load current control signal in response thereto;

means for disabling one of said first and second comparator means in response to and after said one of said said first and second comparator means provides its output signal; and

means for enabling said one of said first and second comparator means in response to comparing a sensed voltage, indicative of the voltage at said one output terminal of said switching device, with respect to a predetermined voltage.

19. A load driver circuit according to claim 18 wherein said disabling means includes means for disabling each of said first and second comparator means in response to and after said each of said first and second comparator means provides its output signal, respectively, and wherein said enabling means enables each of said first and second comparator means in response to the comparison of said sensed voltage after the disabling of each of said first and second comparator means by said disabling means.

20. A load driver circuit according to claim 19 which includes a load current sensing resistor connected in series with said load, said load current signal being provided across said load current sensing resistor.