Bitwise implementation mechanism for a circuit design synthesis procedure

• US 5,222,029 A
• Filed: 12/08/1992
• Issued: 06/22/1993
• Est. Priority Date: 09/12/1986
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Digital Equipment Corporation (HP Inc.)
• Inventors: Hooper, Donald F., Kundu, Snehamay
• Primary Examiner(s): Trans, Vincent N.
• Application Number:
  US07/988,381
• Time in Patent Office: 196 Days
• Field of Search: 364/488, 364/489, 364/490, 364/491, 395/10, 395/54, 395/600, 395/921
• US Class Current: 716/104
• CPC Class Codes: G06F 30/327 Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
• CPC Class Codes: Y10S 707/99943 Generating database or data structure, e.g. via user interface

Abstract

In a procedure for synthesizing circuit designs, a SYNTHESIZE command in a consequence portion of a rule can be used to control the creation of bit-level instances from a description of a more abstract instance whose interface consists of multi-bit signals. The `synthesize` command has a form that identifies multibit signal/part objects in the data base relative to the current multi-bit instance, which are then synthesized over the range of most-significant to least significant bit. A collection of rules, called macrorules are enclosed within a `synthesize` command. An iteration controlled by "current bit", ranging from least significant to most significant bit, ensues. At each step of the iteration, all macrorules are tested and applied if they are `true`. The macrorules can query whether the current bit is a function of the least or most significant bits. The macrorules can also establish connectivity to any signal bit relative to the current, the least significant or the most significant bit. Signals which represent numeric constants, are converted to the correct binary value for each bit of the bitwise synthesis. During this process, new signal names with bit subscripts are generated, if needed, and connections are made so that the resulting data base represents an electrically connected circuit.

Claims

1. A method of creating a plurality of bit-level model instances from higher level model instances for synthesizing circuit designs, the higher level model instances having at least one multi-bit port for receiving at least one multi-bit signal, the bit-level and higher level model instances being stored in a memory of a data processing system, the method comprising the steps of:

selecting for execution in the data processing system a rule having a consequence portion containing a macrorule, the macrorule being executed by the data processing system over a selected one of the bits of the multi-bit signal received by the multi-bit port;

executing in the data processing system a function of the selected macrorule for the selected one bit of the multi-bit signal in order to create a first one of the bit-level model instances; and

repeating in the data processing system the steps of the selecting and executing the macrorule over a succeeding bit of the multi-bit signal using the preceding one of the bit level model instances to create a subsequent bit-level model instance.

2. The method of creating a plurality of bit-level model instances according to claim 1 wherein the rule is stored in the data processing system in a rule table in said memory, said rule table having a plurality of rules.

3. The method of creating a plurality of bit-level model instances according to claim 1 wherein the step of repeating occurs over a number of iterations corresponding to a value of the most significant bit minus the least significant bit of the multi-bit signal plus one.

4. A method of creating bit-level model instances from higher level model instances to synthesize circuit designs, the higher level model instances having at least one multi-bit port for receiving at least one multi-bit signal, the bit-level and higher level model instances being stored in a memory of a data processing system, the method comprising the steps of:

selecting in the data processing system a rule, the rule having an antecedent portion and a consequence portion, the consequence portion containing a macrorule which is executed in said data processing system in accordance with one of the bits of the multi-bit signal received by the multi-bit port;

determining in the data processing system whether a function of the macrorule should be executed in the data processing system for the selected one bit;

executing in the data processing system each determined function to be executed of the selected macrorule for the selected one bit to create a bit-level model instance; and

repeating in the data processing system the steps of selecting, determining, and executing the macrorule for each subsequent bit of the multi-bit signal using the preceding bit level model instance to create a succeeding bit-level model instance.

5. The method of creating bit-level model instances from higher level model instances to synthesize circuit designs according to claim 4 wherein the rule is stored in the data processing system in a rule table having a plurality of rules and the rule table is stored in the memory of the data processing system in a rule base having a plurality of rule tables.

6. The method of creating bit-level model instances from higher level model instances to synthesize circuit designs according to claim 4 wherein the step of repeating occurs over a number of iterations corresponding to a value of the most significant bit minus the least significant bit of the multi-bit signal plus one.

7. The method of creating bit-level model instances from higher level model instances to synthesize circuit designs according to claim 4 wherein the antecedent portion of the rule is ignored.